USER MANUAL
NI PXIe-7846R
R Series Reconfigurable I/O Module (AI, AO, DIO) for PXI Express,
8 AI, 8 AO, 48 DIO, 500 kS/s AI, Kintex-7 160T FPGA
This document provides compliance, pinout, connectivity, mounting, and power information
for the NI PXIe-7846R.
Hardware Overview
The following high-level block diagram represents the NI PXIe-7846R.
Figure 1. NI PXIe-7846R Block Diagram
Device
Temperature
100 MHz
OSC
NI ASIC
Kintex-7
FPGA
NI PXIe-7846R
Flash
Memory
DIO
CONNEC
TOR 0
(MIO)
CONNEC
TOR 1
(DIO)
Data/
Address/
Control
Overvoltage
Protection
Overvoltage
Protection
+5 V
Reference
AO
AO (x8)
DAC
ADC
AI
AI (x8)
INA
DIO (x16)
Overvoltage
Protection
DIO (x32)
Overvoltage
Protection
PXIe Connector
