National Instruments PCI-6528, Manual

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Chapter 2 Register Map and Descriptions
© National Instruments Corporation 2-3 Static DIO Register-Level Programmer Manual
The following pages provide a description of each register. The register bit map shows a
diagram of the register with the most significant bit (MSB), bit 7, on the left and the least
significant bit (LSB), bit 0, on the right. Each bit is represented by a rectangle with the bit
name inside. The size of the register indicates how many bits you should read or write at a
time. Reading a different size—for example, reading a 32-bit register with four 8-bit
reads—may create invalid data.
Table 2-3. NI 6509/651 x /6520/6521/6528 Register Address Map—Watchdog Timer Registers
Register Name
Offset
(Hex) Type Size
Watchdog Timer Software Timeout Enable 0x15 Read-write 8-bit
Watchdog Timer Expire Status 0x17 Read 8-bit
Watchdog Timer Timeout Interval 0x18 Read-write 32-bit
Table 2-4. NI 6509/651 x /6520/6521/6528 Register Address Map—RTSI Configuration Registers
Register Name
Offset
(Hex) Type Size
RTSI Input Route 0x0C Read-write 16-bit
RTSI Pulse when Edge Detected 0x0E Read-write 16-bit
RTSI Pulse when Watchdog Timer Expires 0x10 Read-write 16-bit
RTSI Trigger for Watchdog Timer 0x12 Read-write 16-bit
RTSI Edge Detection Configuration Register 0x16 Read-write 8-bit