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National Instruments Corporation

6-1

NI 6238/6239 User Manual

6

Digital Input and Output

NI 6238/6239 devices have six static digital input lines, P0.<0..5>. These
lines also can be used as PFI inputs.

In addition, the NI 6238/6239 devices have four static digital output lines,
P1.<0..3>. These lines also can be used as PFI output.

The voltage input and output levels and the current drive level of the DI and
DO lines are listed in the

NI 6238/6239 Specifications

. Refer to Chapter 8,

, for more information on PFI inputs and outputs.

I/O Protection

Each DI, DO, and PFI signal is protected against overvoltage and
undervoltage conditions as well as ESD events on NI 6238/6239 devices.
Consult the device specifications for details. However, you should avoid
these fault conditions by following these guidelines.

•

Do

not

connect any digital output line to any external signal source,

ground signal, or power supply.

•

Understand the current requirements of the load connected to the
digital output lines. Do

not

exceed the specified current output limits

of the digital outputs. NI has several signal conditioning solutions for
digital applications requiring high current drive.

•

Do

not

drive the digital input lines with voltages or current outside of

its normal operating range.

•

Treat the DAQ device as you would treat any static sensitive device.

Always

properly ground yourself and the equipment when handling the

DAQ device or connecting to it.

Programmable Power-Up States

By default, the digital output lines (P1.<0..3>/PFI <6..9>) are set to 0. They
can be programmed to power up as 0 or 1.

Refer to the

NI-DAQmx Help

or the

LabVIEW 8.x Help

for more

information about setting power-up states in NI-DAQmx or MAX.

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Summary of Contents for NI 6238

Page 1: ...DAQ M Series NI 6238 6239 User Manual Isolated Current Input Current Output Devices NI 6238 6239 User Manual July 2006 371913A 01 ...

Page 2: ...Korea 82 02 3451 3400 Lebanon 961 0 1 33 28 28 Malaysia 1800 887710 Mexico 01 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 0800 553 322 Norway 47 0 66 90 76 60 Poland 48 22 3390150 Portugal 351 210 311 210 Russia 7 095 783 68 51 Singapore 1800 226 5886 Slovenia 386 3 425 4200 South Africa 27 0 11 805 8197 Spain 34 91 640 0085 Sweden 46 0 8 587 895 00 Switzerland 41 56 200 51 51 Taiwan 886...

Page 3: ...oduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the same NI software is protected by copyright and other intellectu...

Page 4: ...NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION ...

Page 5: ... Specifications xvii Training Courses xvii Technical Support on the Web xvii Chapter 1 Getting Started Installing NI DAQmx 1 1 Installing Other Software 1 1 Installing the Hardware 1 1 Device Pinouts 1 1 Device Specifications 1 2 Device Accessories and Cables 1 2 Chapter 2 DAQ System Overview DAQ Hardware 2 1 DAQ STC2 2 2 Calibration Circuitry 2 3 Sensors and Transducers 2 3 Cables and Accessories...

Page 6: ...ut Triggering 4 11 Field Wiring Considerations 4 11 Analog Input Timing Signals 4 12 AI Sample Clock Signal 4 15 Using an Internal Source 4 16 Using an External Source 4 16 Routing AI Sample Clock Signal to an Output Terminal 4 16 Other Timing Requirements 4 17 AI Sample Clock Timebase Signal 4 17 AI Convert Clock Signal 4 18 Using an Internal Source 4 18 Using an External Source 4 19 Routing AI C...

Page 7: ...utput Timing Signals 5 5 AO Start Trigger Signal 5 5 Using a Digital Source 5 6 Routing AO Start Trigger Signal to an Output Terminal 5 6 AO Pause Trigger Signal 5 6 Using a Digital Source 5 7 Routing AO Pause Trigger Signal to an Output Terminal 5 8 AO Sample Clock Signal 5 8 Using an Internal Source 5 8 Using an External Source 5 8 Routing AO Sample Clock Signal to an Output Terminal 5 8 Other T...

Page 8: ...d 1b Measure Low Frequency with One Counter Averaged 7 11 Method 2 Measure High Frequency with Two Counters 7 12 Method 3 Measure Large Range of Frequencies Using Two Counters 7 13 Choosing a Method for Measuring Frequency 7 14 Position Measurement 7 16 Measurements Using Quadrature Encoders 7 16 Measurements Using Two Pulse Encoders 7 18 Two Signal Edge Separation Measurement 7 19 Single Two Sign...

Page 9: ...r n HW Arm Input 7 30 Counter n Internal Output and Counter n TC Signals 7 30 Routing Counter n Internal Output to an Output Terminal 7 30 Frequency Output Signal 7 30 Routing Frequency Output to a Terminal 7 31 Default Counter Terminals 7 31 Counter Triggering 7 32 Arm Start Trigger 7 32 Start Trigger 7 32 Pause Trigger 7 32 Other Counter Features 7 33 Cascading Counters 7 33 Counter Filters 7 33...

Page 10: ...ors Digital Isolation 9 2 Benefits of an Isolated DAQ Device 9 2 Reducing Common Mode Noise 9 3 Chapter 10 Digital Routing and Clock Generation Clock Routing 10 1 80 MHz Timebase 10 2 20 MHz Timebase 10 2 100 kHz Timebase 10 2 External Reference Clock 10 2 10 MHz Reference Clock 10 3 Synchronizing Multiple Devices 10 3 Real Time System Integration Bus RTSI 10 3 RTSI Connector Pinout 10 4 Using RTS...

Page 11: ...ct Memory Access DMA 11 3 Interrupt Request IRQ 11 4 Programmed I O 11 4 Changing Data Transfer Methods between DMA and IRQ 11 4 Chapter 12 Triggering Triggering with a Digital Source 12 1 Appendix A Device Specific Information NI 6238 A 1 NI 6239 A 4 Appendix B Troubleshooting Analog Input B 1 Analog Output B 2 Counters B 3 Appendix C Technical Support and Professional Services Glossary Index Fig...

Page 12: ...final action The sequence File Page Setup Options directs you to pull down the File menu select the Page Setup item and select Options from the last dialog box This icon denotes a tip which alerts you to advisory information This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system c...

Page 13: ...and where applicable version 7 0 or later of the NI application software NI DAQ The DAQ Getting Started Guide describes how to install your NI DAQmx for Windows software your NI DAQmx supported DAQ device and how to confirm that your device is operating properly Select Start All Programs National Instruments NI DAQ DAQ Getting Started Guide The NI DAQ Readme lists which devices are supported by th...

Page 14: ...rence Help contains VI reference and general information about measurement concepts In LabVIEW select Help NI DAQmx Base VI Reference Help The NI DAQmx Base C Reference Help contains C reference and general information about measurement concepts Select Start All Programs National Instruments NI DAQmx Base Documentation C Function Reference Manual LabVIEW If you are a new user use the Getting Start...

Page 15: ...ng an NI DAQmx Measurement in LabWindows CVI which includes step by step instructions about creating a measurement task using the DAQ Assistant In LabWindows CVI select Help Contents then select Using LabWindows CVI Data Acquisition The NI DAQmx Library book of the LabWindows CVI Help contains API overviews and function reference for NI DAQmx Select Library Reference NI DAQmx Library in the LabWin...

Page 16: ...es of the printed device documents You can find view and or print the documents for each device using the Device Document Browser at any time by inserting the CD After installing the Device Document Browser device documents are accessible from Start All Programs National Instruments NI DAQ Browse Device Documentation Training Courses If you need more help getting started developing an application ...

Page 17: ... must install the software you plan to use with the device Installing NI DAQmx The DAQ Getting Started Guide which you can download at ni com manuals offers NI DAQmx users step by step instructions for installing software and hardware configuring channels and tasks and getting started developing an application Installing Other Software If you are using other software refer to the installation inst...

Page 18: ...cifications available on the NI DAQ Device Document Browser or ni com manuals for more detailed information on NI 6238 6239 devices Device Accessories and Cables NI offers a variety of accessories and cables to use with your DAQ device Refer to Appendix A Device Specific Information or ni com for more information ...

Page 19: ...mming software and PC The following sections cover the components of a typical DAQ system Figure 2 1 Components of a Typical DAQ System DAQ Hardware DAQ hardware digitizes input signals performs D A conversions to generate analog output signals and measures and controls digital I O signals Figure 2 2 features the components of the NI 6238 6239 devices Sensors and Transducers DAQ Hardware Personal ...

Page 20: ...FOs Generation and routing of RTSI signals for multi device synchronization Generation and routing of internal and external timing signals Two flexible 32 bit counter timer modules with hardware gating Static DIO signals PLL for clock synchronization PCI PXI interface Independent scatter gather DMA controllers for all acquisition and generation functions P1 GND P1 Analog Output Analog Input PFI St...

Page 21: ...ctrical signals to measure physical phenomena such as temperature force sound or light Some commonly used sensors are strain gauges thermocouples thermistors angular encoders linear encoders and resistance temperature detectors RTDs Note Current input measurement devices can only interface with sensors that output a current To measure signals from these various transducers you must convert them in...

Page 22: ...lications However if you want to develop your own cable the following kits can assist you TB 37F 37SC 37 pin solder cup terminals shell with strain relief TB 37F 37CP 37 pin crimp poke terminals shell with strain relief Also adhere to the following guidelines for best results For AI signals use shielded twisted pair wires for each AI pair of differential inputs Connect the shield for each signal p...

Page 23: ...ftware configuration Refer to the DAQ Getting Started Guide for more information about the two drivers NI DAQmx includes a collection of programming examples to help you get started developing an application You can modify example code and save it in an application You can use examples to develop a new application or add example code to an existing application To locate LabVIEW and LabWindows CVI ...

Page 24: ...rrent return point AI GND and AO GND are connected on the device Note AI GND and AO GND are isolated from earth ground chassis ground P0 GND and P1 GND AI 0 7 AI GND Input Analog Input Channels 0 to 7 AI 0 and AI 0 are the positive and negative inputs of differential analog input channel 0 Similarly the following signal pairs also form differential input channels AI 1 AI 1 AI 2 AI 2 AI 3 AI 3 AI 4...

Page 25: ...an output directional PFI terminal or a digital output terminal As a PFI output you can route many different internal AI or AO timing signals to each PFI terminal You also can route the counter timer outputs to each PFI terminal Note PFI 6 9 P1 0 3 are isolated from earth ground chassis ground AI GND AO GND and P0 GND NC No connect Do not connect signals to these terminals P0 GND Digital Ground P0...

Page 26: ...lock Generation for information on the RTSI connector CAL External Calibration Positive Reference CAL supplies the positive reference during external calibration of the NI 6238 6239 CAL External Calibration Negative Reference CAL supplies the negative reference during external calibration of the NI 6238 6239 Table 3 1 I O Connector Signals Continued Signal Name Reference Direction Description ...

Page 27: ... Analog Current Input Signals section Also refer to Appendix A Device Specific Information for device I O connector pinouts MUX Each M Series device has one analog to digital converter ADC The multiplexers MUX route one AI channel at a time to the ADC through the NI PGIA Instrumentation Amplifier NI PGIA The NI programmable gain instrumentation amplifier PGIA is a measurement and instrument class ...

Page 28: ...vices can perform both single and multiple A D conversions of a fixed or infinite number of samples A large first in first out FIFO buffer holds data during AI acquisitions to ensure that no data is lost M Series devices can handle multiple A D conversion operations with DMA interrupts or programmed I O Analog Input Range Input range refers to the set of input voltages or currents that an analog i...

Page 29: ...out of range For more information on programming these settings refer to the NI DAQmx Help or the LabVIEW 8 x Help Table 4 1 shows the input ranges and resolutions supported by the NI 6238 and NI 6239 devices Connecting Analog Current Input Signals When making signal connections caution must be taken with the voltage level of the signal going into the device There are two types of connections that...

Page 30: ...4 3 ties the AI input to AI GND When measuring current up to 20 mA this type of connection ensures that the voltage level on both the positive and negative side are within the common mode input range for NI 6238 6239 devices Figure 4 3 Analog Current Input Connection Method 2 AI AI Isolation Barrier AI GND V AI GND AI AI Isolation Barrier AI GND ...

Page 31: ...oltage levels provided that the common mode input range requirement is satisfied For example in Figure 4 4 the node connected to AI GND can be at 50 V above the earth ground Figure 4 4 Current Measurement at High Voltage Levels Analog Input Ground Reference Settings The NI 6238 6239 device measures the voltage generated across the current input sense resistor during current input measurement This ...

Page 32: ...oard reference the signal is measured against AI GND This measurement method is called referenced single ended RSE The name is derived from the fact that one end of the measurement the positive input of the PGIA is connected to a signal and the negative input of the PGIA is connected to the AI GND reference Table 4 2 shows how signals are routed to the NI PGIA Note On devices that allow multiple g...

Page 33: ...es referred to as AI terminal configuration Configuring AI Ground Reference Settings in Software You can program channels on an M Series device to acquire with different ground references To enable multimode scanning in LabVIEW use NI DAQmx Create Virtual Channel vi of the NI DAQmx API You must use a new VI for each channel or group of channels configured in a different input mode In Figure 4 6 ch...

Page 34: ... can increase the settling time which decreases the accuracy of your measurements To ensure fast settling times you should do the following in order of importance Use short high quality cabling Minimize current step between adjacent channels Avoid scanning faster than necessary Refer to the following sections for more information on these factors Use Short High Quality Cabling Using short high qua...

Page 35: ...0 ms and average the results You could acquire 500 points from each channel at a scan rate of 125 kS s Another method would be to acquire 1 000 points from each channel at a scan rate of 250 kS s Both methods take the same amount of time Doubling the number of samples averaged from 500 to 1 000 decreases the effect of noise by a factor of 1 4 the square root of 2 However doubling the number of sam...

Page 36: ...ignal can be generated internally on your device or provided externally Hardware timed acquisitions have several advantages over software timed acquisitions The time between samples can be much shorter The timing between samples is deterministic Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or non buffered A buffer is a temporary storage in compu...

Page 37: ...the PC buffer fast enough to keep up with the data transfer the buffer could reach an overflow condition causing an error to be generated Non Buffered In non buffered acquisitions data is read directly from the FIFO on the device Typically hardware timed non buffered operations are used to read single samples with known time increments between them and good latency Analog Input Triggering Analog i...

Page 38: ...o the NI Developer Zone document Field Wiring and Noise Considerations for Analog Signals for more information To access this document go to ni com info and enter the info code rdfwn3 Analog Input Timing Signals In order to provide all of the timing functionality described throughout this section NI 6238 6239 devices have a flexible timing engine Figure 4 7 summarizes all of the timing options pro...

Page 39: ...mum scan rate to derive the Channel Clock As the scan rate increases there eventually will not be enough time to have a full 10 μs of additional delay time between channel conversions and to finish acquiring all channels before the next edge of the Scan Clock At this point NI DAQmx uses round robin channel sampling evenly dividing the time between scans by the number of channels being acquired to ...

Page 40: ...gate one channel at 250 kS s or two channels at 125 kS s per channel illustrates the relationship Posttriggered data acquisition allows you to view only data that is acquired after a trigger event is received A typical posttriggered DAQ sequence is shown in Figure 4 9 In this example the DAQ device reads two channels five times The sample counter is loaded with the specified number of posttrigger ...

Page 41: ...ue decrements until the specified number of posttrigger samples have been acquired NI 6238 6239 devices feature the following analog input timing signals AI Sample Clock Signal AI Sample Clock Timebase Signal AI Convert Clock Signal AI Convert Clock Timebase Signal AI Hold Complete Event Signal AI Start Trigger Signal AI Reference Trigger Signal AI Pause Trigger Signal AI Sample Clock Signal Use t...

Page 42: ...he NI DAQmx Help or the LabVIEW 8 x Help for more information Using an External Source Use one of the following external signals as the source of ai SampleClock Input PFI 0 5 RTSI 0 7 PXI_STAR Note Refer to the NI 6238 6239 Specifications for the minimum allowable pulse width and the propagation delay of PFI 0 5 Routing AI Sample Clock Signal to an Output Terminal You can route ai SampleClock out ...

Page 43: ...o the first ai SampleClock pulse By default this delay is set to two ticks of the ai SampleClockTimebase signal When using an externally generated ai SampleClock you must ensure the clock signal is consistent with respect to the timing requirements of ai ConvertClock Failure to do so may result in ai SampleClock pulses that are masked off and acquisitions with erratic sampling intervals Refer to t...

Page 44: ...ng edge of ai ConvertClock With NI DAQmx the driver will choose the fastest conversion rate possible based on the speed of the A D converter and add 10 µs of padding between each channel to allow for adequate settling time This scheme enables the channels to approximate simultaneous sampling and still allow for adequate settling time If the AI Sample Clock rate is too fast to allow for this 10 µs ...

Page 45: ...ation delay of PFI 0 5 Routing AI Convert Clock Signal to an Output Terminal You can route ai ConvertClock as an active low signal out to any output PFI 6 9 or RTSI 0 7 terminal PFI 0 5 terminals are fixed inputs PFI 6 9 terminals are fixed outputs Using a Delay from Sample Clock to Convert Clock When using an internally generated ai ConvertClock you also can specify a configurable delay from ai S...

Page 46: ...rly the device ignores all ai ConvertClock pulses until it recognizes an ai SampleClock pulse After the device receives the correct number of ai ConvertClock pulses it ignores subsequent ai ConvertClock pulses until it receives another ai SampleClock Figure 4 13 shows timing sequences for a four channel acquisition using AI channels 0 1 2 and 3 and demonstrates proper and improper sequencing of ai...

Page 47: ...ase ai ConvertClockTimebase is not available as an output on the I O connector AI Hold Complete Event Signal The AI Hold Complete Event ai HoldCompleteEvent signal generates a pulse after each A D conversion begins You can route ai HoldCompleteEvent out to any output PFI 6 9 or RTSI 0 7 terminal The polarity of ai HoldCompleteEvent is software selectable but is typically configured so that a low t...

Page 48: ...l source specify a source and an edge The source can be any of the following signals Input PFI 0 5 RTSI 0 7 Counter n Internal Output PXI_STAR Note Refer to the NI 6238 6239 Specifications for the minimum allowable pulse width and the propagation delay of PFI 0 5 The source also can be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or t...

Page 49: ...er samples the DAQ device begins to look for the reference trigger condition If the reference trigger condition occurs before the DAQ device captures the specified number of pretrigger samples the DAQ device ignores the condition If the buffer becomes full the DAQ device continuously discards the oldest samples in the buffer to make space for the next sample This data can be accessed with some lim...

Page 50: ...gger out to any output PFI 6 9 or RTSI 0 7 terminal AI Pause Trigger Signal You can use the AI Pause Trigger ai PauseTrigger signal to pause and resume a measurement acquisition The internal sample clock pauses while the external trigger signal is active and resumes when the signal is inactive You can program the active level of the pause trigger to be high or low Using a Digital Source To use ai ...

Page 51: ...AI Applications in Software You can use the M Series device in the following analog input applications Single point analog input Finite analog input Continuous analog input You can perform these applications through DMA interrupt or programmed I O data transfer mechanisms Some of the applications also use start reference and pause triggers Note For more information about programming analog input a...

Page 52: ...NI 6238 6239 Analog Current Output Circuitry Analog Output Circuitry DACs Digital to analog converters DACs convert digital codes to analog voltages V I Converter The V I converter converts voltage V into current I AO FIFO The AO FIFO enables analog output waveform generation It is a first in first out FIFO memory buffer between the computer and the AO 1 AO POWER SUPPLY DAC0 AO FIFO Isolation Barr...

Page 53: ...ware controls the rate at which data is generated Software sends a separate command to the hardware to initiate each DAC conversion In NI DAQmx software timed generations are referred to as on demand timing Software timed generations are also referred to as immediate or static operations They are typically used for writing a single value out such as a constant DC current Hardware Timed Generations...

Page 54: ...ration of an unspecified number of samples Instead of generating a set number of data samples and stopping a continuous generation continues until you stop the operation There are several different methods of continuous generation that control what data is written These methods are regeneration FIFO regeneration and non regeneration modes Regeneration is the repetition of the data that is already ...

Page 55: ... triggering actions Connecting Analog Current Output Signals AO 0 1 are the current output signals for AO channels 0 and 1 AO GND is the ground reference for AO 0 1 Figure 5 2 shows how to make analog current output connections to the device Figure 5 2 Analog Current Output Connections Tip Internal voltage drop for the NI 6238 6239 devices is a maximum of 3 V relative to the externally supplied vo...

Page 56: ... such signal connections Analog Output Timing Signals Figure 5 3 summarizes all of the timing options provided by the analog output timing engine Figure 5 3 Analog Output Timing Options NI 6238 6239 devices feature the following AO waveform generation timing signals AO Start Trigger Signal AO Pause Trigger Signal AO Sample Clock Signal AO Sample Clock Timebase Signal AO Start Trigger Signal Use th...

Page 57: ...so can specify whether the waveform generation begins on the rising edge or falling edge of ao StartTrigger Routing AO Start Trigger Signal to an Output Terminal You can route ao StartTrigger out to any output PFI 6 9 or RTSI 0 7 terminal The output is an active high pulse PFI 0 5 terminals are fixed inputs PFI 6 9 terminals are fixed outputs AO Pause Trigger Signal Use the AO Pause Trigger signal...

Page 58: ...dge of the sample clock is received as shown in Figure 5 5 Figure 5 5 ao PauseTrigger with Other Signal Source Using a Digital Source To use ao PauseTrigger specify a source and a polarity The source can be one of the following signals Input PFI 0 5 RTSI 0 7 PXI_STAR Note Refer to the NI 6238 6239 Specifications for the minimum allowable pulse width and the propagation delay of PFI 0 5 The source ...

Page 59: ...DAC update begins on the rising edge or falling edge of ao SampleClock Using an Internal Source One of the following internal signals can drive ao SampleClock AO Sample Clock Timebase divided down Counter n Internal Output A programmable internal counter divides down the AO Sample Clock Timebase signal Using an External Source Use one of the following external signals as the source of ao SampleClo...

Page 60: ...is delay is two ticks of ao SampleClockTimebase Figure 5 6 shows the relationship of ao SampleClock to ao StartTrigger Figure 5 6 ao SampleClock and ao StartTrigger AO Sample Clock Timebase Signal The AO Sample Clock Timebase ao SampleClockTimebase signal is divided down to provide a source for ao SampleClock You can route any of the following signals to be the AO Sample Clock Timebase ao SampleCl...

Page 61: ...leClock rather than ao SampleClockTimebase Getting Started with AO Applications in Software You can use an M Series device in the following analog output applications Single point on demand generation Finite generation Continuous generation Waveform generation You can perform these generations through programmed I O interrupt or DMA data transfer mechanisms Some of the applications also use start ...

Page 62: ...void these fault conditions by following these guidelines Do not connect any digital output line to any external signal source ground signal or power supply Understand the current requirements of the load connected to the digital output lines Do not exceed the specified current output limits of the digital outputs NI has several signal conditioning solutions for digital applications requiring high...

Page 63: ... 3 are referenced to P1 GND Figures 6 1 and 6 2 show P0 0 5 and P1 0 3 on the NI 6238 and the NI 6239 device respectively Digital input and output signals can range from 0 to 30 V Refer to the NI 6238 6239 Specifications for more information Figure 6 1 NI 6238 Digital I O Connections DO Source P1 0 3 P1 VCC P1 0 P1 1 P1 GND P0 0 P0 GND P1 GND P0 GND Digital Isolators ...

Page 64: ...s which are listed in the NI 6238 6239 Specifications can damage the DAQ device and the computer NI is not liable for any damage resulting from such signal connections Logic Conventions With NI 6238 6239 devices logic 0 means that the Darlington output switch is open while logic 1 means closed Table 6 1 summarizes the expected behavior P1 0 3 P1 0 P1 VCC P1 GND P1 1 P1 GND P0 0 P0 GND P0 GND P1 GN...

Page 65: ...vices in the following digital I O applications Static digital input Static digital output Note For more information about programming digital I O applications and triggers in software refer to the NI DAQmx Help or the LabVIEW 8 x Help Table 6 1 NI 6238 6239 Logic Conventions Device Logic 0 1 NI 6238 Source P1 GND P1 VCC NI 6239 Sink P1 VCC P1 GND ...

Page 66: ... and one frequency generator as shown in Figure 7 1 The general purpose counter timers can be used for many measurement and pulse generation applications Caution When making measurements take into account the minimum pulse width and time delay of the digital input and output lines Refer to the NI 6238 6239 Specifications for more information ...

Page 67: ...0 Counter 0 Source Counter 0 Timebase Counter 0 Aux Counter 0 HW Arm Counter 0 A Counter 0 B Counter 0 Up_Down Counter 0 Z Counter 0 Gate Counter 0 Internal Output Counter 0 TC Input Selection Muxes Frequency Generator Frequency Output Timebase Freq Out Input Selection Muxes Counter 1 Counter 1 Source Counter 1 Timebase Counter 1 Aux Counter 1 HW Arm Counter 1 A Counter 1 B Counter 1 Up_Down Count...

Page 68: ...input after the counter is armed On demand refers to the fact that software can read the counter contents at any time without disturbing the counting process Figure 7 2 shows an example of single point edge counting Figure 7 2 Single Point On Demand Edge Counting You also can use a pause trigger to pause or gate the counter When the pause trigger is active the counter ignores edges on its Source i...

Page 69: ...returned are the cumulative counts since the counter armed event That is the sample clock does not reset the counter You can route the counter sample clock to the Gate input of the counter You can configure the counter to sample on the rising or falling edge of the sample clock Figure 7 4 shows an example of buffered edge counting Notice that counting begins when the counter is armed which occurs ...

Page 70: ... edge on Gate Notice that if you are using an external signal as the Source at least one Source pulse should occur between each active edge of the Gate signal This condition ensures that correct values are returned by the counter If this condition is not met consider using duplicate count prevention Controlling the Direction of Counting In edge counting applications the counter can count up or dow...

Page 71: ... the counter is armed while a pulse train is in progress If a counter is armed while the pulse is in the active state it will wait for the next transition to the active state to begin the measurement Single Pulse Width Measurement With single pulse width measurement the counter counts the number of edges on the Source input while the Gate input remains active When the Gate input goes inactive the ...

Page 72: ...r If this condition is not met consider using duplicate count prevention For information on connecting counter signals refer to the Default Counter Terminals section Period Measurement In period measurements the counter measures a period on its Gate input signal after the counter is armed You can configure the counter to measure the period between two rising edges or two falling edges of the Gate ...

Page 73: ...surement is similar to single period measurement but buffered period measurement measures multiple periods The counter counts the number of rising or falling edges on the Source input between each pair of active edges on the Gate input At the end of each period on the Gate signal the counter stores the count in a hardware save register A DMA controller transfers the stored values to host memory Th...

Page 74: ...nter measures a semi period on its Gate input signal after the counter is armed A semi period is the time between any two consecutive edges on the Gate input You can route an internal or external periodic clock signal with a known period to the Source input of the counter The counter counts the number of rising or falling edges occurring on the Source input between two edges of the Gate signal You...

Page 75: ...emi Period Measurement Note that if you are using an external signal as the Source at least one Source pulse should occur between each active edge of the Gate signal This condition ensures that correct values are returned by the counter If this condition is not met consider using duplicate count prevention For information on connecting counter signals refer to the Default Counter Terminals section...

Page 76: ...several periods of your signal using a known timebase This method is good for low to medium frequency signals You can route the signal to measure F1 to the Gate of a counter You can route a known timebase Ft to the Source of the counter The known timebase can be 80MHzTimebase For signals that might be slower than 0 02 Hz use a slower known timebase You can configure the counter to make K 1 buffere...

Page 77: ...an generate the pulse externally and connect it to a PFI or RTSI terminal You only need to use one counter if you generate the pulse externally Route the signal to measure F1 to the Source of the counter Configure the counter for a single pulse width measurement Suppose you measure the width of pulse T to be N periods of F1 Then the frequency of F1 is N T Figure 7 13 illustrates this method Anothe...

Page 78: ...long pulse using the signal to measure You then measure the long pulse with a known timebase The M Series device can measure this long pulse more accurately than the faster input signal You can route the signal to measure to the Source input of Counter 0 as shown in Figure 7 14 Assume this signal to measure has frequency F1 Configure Counter 0 to generate a single pulse that is the width of N peri...

Page 79: ...efore the frequency of F1 is given by F1 F2 N J Choosing a Method for Measuring Frequency The best method to measure frequency depends on several factors including the expected frequency of the signal to measure the desired accuracy how many counters are available and how long the measurement can take Method 1 uses only one counter It is a good method for many applications However the accuracy of ...

Page 80: ...gnal to measure decreases At very low frequencies Method 2 may be too inaccurate for your application Another disadvantage of Method 2 is that it requires two counters if you cannot provide an external signal of known width An advantage of Method 2 is that the measurement completes in a known amount of time Method 3 measures high and low frequency signals accurately However it requires two counter...

Page 81: ...X1 X2 or X4 encoding A quadrature encoder can have up to three channels channels A B and Z X1 Encoding When channel A leads channel B in a quadrature cycle the counter increments When channel B leads channel A in a quadrature cycle the counter decrements The amount of increments and decrements per cycle depends on the type of encoding X1 X2 or X4 Figure 7 15 shows a quadrature cycle and the result...

Page 82: ...ing Whether the counter increments or decrements depends on which channel leads the other Each cycle results in four increments or decrements as shown in Figure 7 17 Figure 7 17 X4 Encoding Channel Z Behavior Some quadrature encoders have a third channel channel Z which is also referred to as the index channel A high level on channel Z causes the counter to be reloaded with a specified value in a ...

Page 83: ...phase is true and channel Z is high Incrementing and decrementing takes priority over reloading Thus when the channel B goes low to enter the reload phase the increment occurs first The reload occurs within one maximum timebase period after the reload phase becomes true After the reload occurs the counter continues to count as before Figure 7 18 channel Z reload with X4 decoding Figure 7 18 Channe...

Page 84: ...ctive edge on the Gate input The counter stores the count in a hardware save register You can configure the rising or falling edge of the Aux input to be the active edge You can configure the rising or falling edge of the Gate input to be the active edge Use this type of measurement to count events or measure the time that occurs between edges on two signals This type of measurement is sometimes r...

Page 85: ...e of the Aux signal The counter then stores the count in a hardware save register On the next active edge of the Gate signal the counter begins another measurement A DMA controller transfers the stored values to host memory Figure 7 21 shows an example of a buffered two signal edge separation measurement Figure 7 21 Buffered Two Signal Edge Separation Measurement For information on connecting coun...

Page 86: ... of a pulse with a pulse delay of four and a pulse width of three using the rising edge of Source Figure 7 22 Single Pulse Generation Single Pulse Generation with Start Trigger The counter can output a single pulse in response to one pulse on a hardware Start Trigger signal The pulse appears on the Counter n Internal Output signal of the counter You can route the Start Trigger signal to the Gate i...

Page 87: ...lse You also can specify the pulse width The delay and pulse width are measured in terms of a number of active edges of the Source input The counter ignores the Gate input while a pulse generation is in progress After the pulse generation is finished the counter waits for another Start Trigger signal to begin another pulse generation Figure 7 24 shows a generation of two pulses with a pulse delay ...

Page 88: ...or falling The counter can begin the pulse train generation as soon as the counter is armed or in response to a hardware Start Trigger You can route the Start Trigger to the Gate input of the counter You also can use the Gate input of the counter as a Pause Trigger if it is not used as a Start Trigger The counter pauses pulse generation when the Pause Trigger is active Figure 7 25 shows a continuo...

Page 89: ... Frequency Output signal The Frequency Output signal is the Frequency Output Timebase divided by a number you select from 1 to 16 The Frequency Output Timebase can be either the 20 MHz Timebase divided by 2 or the 100 kHz Timebase The duty cycle of Frequency Output is 50 if the divider is either 1 or an even number For an odd divider suppose the divider is set to D In this case Frequency Output is...

Page 90: ...ween the Gate and the pulse on the output by a specified amount Thus the delay between the Gate and the pulse produced successively increases Note ETS Equivalent Time Sampling The increase in the delay value can be between 0 and 255 For instance if you specify the increment to be 10 the delay between the active Gate edge and the pulse on the output will increase by 10 every time a new pulse is gen...

Page 91: ...re the following counter timing signals Counter n Source Counter n Gate Counter n Aux Counter n A Counter n B Counter n Z Counter n Up_Down Counter n HW Arm Counter n Internal Output Counter n TC Frequency Output In this section n refers to either Counter 0 or 1 For example Counter n Source refers to two signals Counter 0 Source the source input to Counter 0 and Counter 1 Source the source input t...

Page 92: ... Gate can be routed to Counter 0 Source Counter 0 TC or Counter 0 Gate can be routed to Counter 1 Source Some of these options may not be available in some driver software Routing Counter n Source to an Output Terminal You can route Counter n Source out to any output PFI 6 9 or RTSI 0 7 terminal All PFIs are set to high impedance at startup Table 7 3 Counter Applications and Counter n Source Appli...

Page 93: ...AR In addition Counter 1 Internal Output or Counter 1 Source can be routed to Counter 0 Gate Counter 0 Internal Output or Counter 0 Source can be routed to Counter 1 Gate Some of these options may not be available in some driver software Routing Counter n Gate to an Output Terminal You can route Counter n Gate out to any output PFI 6 9 or RTSI 0 7 terminal All PFIs are set to high impedance at sta...

Page 94: ...rs or measuring two pulse encoders Routing Signals to A B and Z Counter Inputs Each counter has independent input selectors for each of the A B and Z inputs Any of the following signals can be routed to each input RTSI 0 7 Input PFI 0 5 PXI_STAR Routing Counter n Z Signal to an Output Terminal You can route Counter n Z out to RTSI 0 7 Counter n Up_Down Signal Counter n Up_Down is another name for ...

Page 95: ...utput can be routed to Counter 0 HW Arm Counter 0 Internal Output can be routed to Counter 1 HW Arm Some of these options may not be available in some driver software Counter n Internal Output and Counter n TC Signals Counter n TC is an internal signal that asserts when the counter value is 0 The Counter n Internal Output signal changes in response to Counter n TC The two software selectable outpu...

Page 96: ...e NI DAQmx Help or the LabVIEW 8 x Help for more information on how to connect your signals for common counter measurements and generations M Series default PFI lines for counter functions are listed in Physical Channels in the NI DAQmx Help or the LabVIEW 8 x Help Table 7 4 NI 6238 6239 Device Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name Port CTR 0 SRC 13 PFI 0...

Page 97: ...e generation After a continuous generation has triggered the pulses continue to generate until you stop the operation in software For finite generations the specified number of pulses is generated and the generation stops unless you use the retriggerable attribute When you use this attribute subsequent start triggers cause the generation to restart When using a start trigger the start trigger sour...

Page 98: ...ed your device samples the input on each rising edge of a filter clock M Series devices use an onboard oscillator to generate the filter clock with a 40 MHz frequency Note NI DAQmx only supports filters on counter inputs The following is an example of low to high transitions of the input signal High to low transitions work similarly Assume that an input terminal has been low for a long time The in...

Page 99: ...ng with M Seriesand CompactDAQ for more information about digital filters and counters To access this KnowledgeBase go to ni com info and enter the info code rddfms Prescaling Prescaling allows the counter to count a signal that is faster than the maximum timebase of the counter M Series devices offer 8X and 2X prescaling on each counter prescaling can be disabled Each prescaler consists of a smal...

Page 100: ... the counter Source is one of the internal timebases 80MHzTimebase 20MHzTimebase or 100kHzTimebase Duplicate Count Prevention Duplicate count prevention or synchronous counting mode ensures that a counter returns correct data in applications that use a slow or non periodic external source Duplicate count prevention applies only to buffered counter applications such as measuring frequency or period...

Page 101: ...ource pulse In this example the counter stores the values in the buffer on the first rising Source edge after the rising edge of Gate The details of when exactly the counter synchronizes the Gate signal vary depending on the synchronization mode Synchronization modes are described in the Synchronization Modes section Example Application That Works Incorrectly Duplicate Counting In Figure 7 32 afte...

Page 102: ...ount to be stored in the buffer even if no Source edges occur between Gate signals as shown in Figure 7 33 Figure 7 33 Duplicate Count Prevention Example Even if the Source pulses are long the counter increments only once for each Source pulse Normally the counter value and Counter n Internal Output signals change synchronously to the Source signal With duplicate count prevention the Gate Source C...

Page 103: ...duplicate count prevention Enabling Duplicate Count Prevention in NI DAQmx You can enable duplicate count prevention in NI DAQmx by setting the Enable Duplicate Count Prevention attribute property For specific information on finding the Enable Duplicate Count Prevention attribute property refer to the help file for the API you are using Synchronization Modes The 32 bit counter counts up or down sy...

Page 104: ... In other internal source mode the device synchronizes signals on the falling edge of the source and counts on the following rising edge of the source as shown in Figure 7 35 Table 7 6 Synchronization Mode Conditions Duplicate Count Prevention Enabled Type of Measurement SignalDriving Counter n Source Synchronization Mode Yes Any Any 80 MHz Source No Position Measurement Any 80 MHz Source No Any 8...

Page 105: ...vice generates a delayed Source signal by delaying the Source signal by several nanoseconds The device synchronizes signals on the rising edge of the delayed Source signal and counts on the following rising edge of the source as shown in Figure 7 36 Figure 7 36 External Source Mode Source Synchronize Count Source Delayed Source Synchronize Count ...

Page 106: ... Caution When making measurements take into account the minimum pulse width and time delay of the digital input and output lines Figure 8 1 shows the circuitry of one PFI input line Each PFI line is similar Figure 8 1 NI 6238 6239 PFI Input Circuitry Each PFI 6 9 P1 0 3 can be configured as a timing output signal from AI AO or counter timer functions or a static digital output Figure 8 2 shows the...

Page 107: ...s as Timing Input Signals Use PFI 0 5 terminals to route external timing signals to many different M Series functions Each input PFI terminal can be routed to any of the following signals AI Convert Clock AI Sample Clock AI Start Trigger AI Reference Trigger AI Pause Trigger AI Sample Clock Timebase AO Start Trigger AO Sample Clock AO Sample Clock Timebase AO Pause Trigger Counter input signals fo...

Page 108: ... observable by the user or another instrument Refer to the Digital Output Port 1 section of the NI 6238 6239 Specifications for more information Using PFI Terminals as Static Digital Inputs and Outputs When a terminal is used as a static digital input or output it is called P0 x or P1 x On the I O connector each terminal is labeled PFI x P0 x or PFI x P1 x Connecting PFI Input Signals All PFI inpu...

Page 109: ...Note NI DAQmx only supports filters on counter inputs The following is an example of low to high transitions of the input signal High to low transitions work similarly Assume that an input terminal has been low for a long time The input terminal then changes from low to high but glitches several times When the filter clock has sampled the signal high on N consecutive edges the low to high transiti...

Page 110: ...ltered version of the input signal Refer to the KnowledgeBase document Digital Filtering with M Series and CompactDAQ for more information about digital filters and counters To access this KnowledgeBase go to ni com info and enter the info code rddfms I O Protection Each DI DO and PFI signal is protected against overvoltage and undervoltage conditions as well as ESD events on NI 6238 6239 devices ...

Page 111: ...ide of its normal operating range Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Programmable Power Up States By default the digital output lines P1 0 3 PFI 6 9 are set to 0 They can be programmed to power up as 0 or 1 Refer to the NI DAQmx Help or the LabVIEW 8 x Help for more i...

Page 112: ...hapter 8 PFI National Instruments Corporation 8 7 NI 6238 6239 User Manual Figure 8 5 NI 6238 Digital I O Connections DO Source P1 0 3 P1 VCC P1 0 P1 1 P1 GND P0 0 P0 GND P1 GND P0 GND Digital Isolators ...

Page 113: ...ng the maximum input voltage or maximum working voltage ratings which are listed in the NI 6238 6239 Specifications can damage the DAQ device and the computer NI is not liable for any damage resulting from such signal connections P1 0 3 P1 0 P1 VCC P1 GND P1 1 P1 GND P0 0 P0 GND P0 GND P1 GND Digital Isolators Buffer ...

Page 114: ...rcuitry RTSI digital routing and clock generation are all referenced to a non isolated ground Refer to Table 9 1 for an example of the symbols for isolated ground and non isolated ground Figure 9 1 General NI 6238 6239 Block Diagram Table 9 1 Ground Symbols Isolated Ground Non Isolated Ground P1 GND P1 Analog Output Analog Input PFI Static DI PFI Static DO Digital Routing and Clock Generation Bus ...

Page 115: ...s digital isolators Unlike analog isolators digital isolators do not introduce any analog error in the measurements taken by the device The A D converter used for analog input is on the isolated side of the device The analog inputs are digitized before they are sent across the isolation barrier Similarly the D A converters used for analog output are on the isolated side of the device Benefits of a...

Page 116: ... returning to the non isolated side which is earth ground These parasitic currents interact with parasitic and non parasitic resistances causing voltage spikes These voltage spikes are called common mode noise a noise source that travels in the ground and is therefore common to both the ground and any signal referenced to the ground such as AI AO and digital signals Common mode noise appears at th...

Page 117: ...The acquisition generation sub systems use these signals to manage acquisitions and generations These signals can come from the following sources Your M Series device Other devices in your system through RTSI User input through the PFI terminals User input through the PXI_STAR terminal Routes and generates the main clock signals for the M Series device Clock Routing Figure 10 1 shows the clock rou...

Page 118: ...Timebase by dividing down the 80 MHz Timebase 100 kHz Timebase The 100 kHz Timebase can be used to generate many of the AI and AO timing signals The 100 kHz Timebase also can be used as the Source input to the 32 bit general purpose counter timers The 100 kHz Timebase is generated by dividing down the 20 MHz Timebase by 200 External Reference Clock The external reference clock can be used as a sou...

Page 119: ...he initiator device receive the 10 MHz Reference Clock from RTSI This signal becomes the external reference clock A PLL on each device generates the internal timebases synchronous to the external reference clock On PXI systems you also can synchronize devices to PXI_CLK10 In this application the PXI chassis acts as the initiator Each PXI module routes PXI_CLK10 to its external reference clock Anot...

Page 120: ...ny as five DAQ vision motion or CAN devices in the computer In a PXI system the RTSI bus consists of the RTSI bus interface and the PXI trigger signals on the PXI backplane This bus can route timing and trigger signals between several functions on as many as seven DAQ devices in the system RTSI Connector Pinout Figure 10 2 shows the RTSI connector pinout and Table 10 1 describes the RTSI signals T...

Page 121: ...rigger ao SampleClock ao StartTrigger ao PauseTrigger 10 MHz Reference Clock Counter n Source Gate Z Internal Output FREQ OUT Input PFI 0 5 Note Signals with a are inverted before being driven on the RTSI terminals Table 10 1 RTSI Signal Descriptions RTSI Bus Signal Terminal RTSI 7 34 RTSI 6 32 RTSI 5 30 RTSI 4 28 RTSI 3 26 RTSI 2 24 RTSI 1 22 RTSI 0 20 Not Connected Do not connect signals to thes...

Page 122: ...e input is edge or level sensitive RTSI Filters You can enable a programmable debouncing filter on each PFI RTSI or PXI_STAR signal When the filters are enabled your device samples the input on each rising edge of a filter clock M Series devices use an onboard oscillator to generate the filter clock with a 40 MHz frequency Note NI DAQmx only supports filters on counter inputs The following is an e...

Page 123: ...ries device does not use the filtered version of the input signal Refer to the KnowledgeBase document Digital Filtering with M Series and CompactDAQ for more information about digital filters and counters To access this KnowledgeBase go to ni com info and enter the info code rddfms PXI Clock and Trigger Signals Note PXI clock and trigger signals are only available on PXI devices Other devices use ...

Page 124: ... documentation for your chassis for details PXI_STAR Trigger In a PXI system the Star Trigger bus implements a dedicated trigger line between the first peripheral slot adjacent to the system slot and the other peripheral slots The Star Trigger can be used to synchronize multiple devices or to share a common trigger signal among devices A Star Trigger controller can be installed in this first perip...

Page 125: ...The value of N depends on the filter setting refer to Table 10 3 The filter setting for each input can be configured independently On power up the filters are disabled Figure 10 4 shows an example of a low to high transition on an input that has its filter set to 125 ns N 5 Figure 10 4 Filter Example Enabling filters introduces jitter on the input signal For the 125 ns and 6 425 µs filter settings...

Page 126: ...or a RTSI input is routed directly to PFI the M Series device does not use the filtered version of the input signal Refer to the KnowledgeBase document Digital Filtering with M Series and CompactDAQ for more information about digital filters and counters To access this KnowledgeBase go to ni com info and enter the info code rddfms ...

Page 127: ...erface DMA Controllers NI 6238 6239 devices have four fully independent DMA controllers for high performance transfers of data blocks One DMA controller is available for each measurement and acquisition block Analog input Analog output Counter 0 Counter 1 Each DMA controller channel contains a FIFO and independent processes for filling and emptying the FIFO This allows the buses involved in the tr...

Page 128: ...chassis PXI specifications are developed by the PXI System Alliance www pxisa org Using the terminology of the PXI specifications NI PXI 6238 6239 devices are 3U Hybrid Slot Compatible PXI 1 Peripheral Modules 3U designates devices that are 100 mm tall as opposed to the taller 6U modules Hybrid slot compatible defines where the device can be installed PXI 6238 6239 devices can be installed in the ...

Page 129: ...CI chassis adhering to the PICMG CompactPCI 2 0 R3 0 core specification PXI specific features are implemented on the J2 connector of the CompactPCI bus The PXI device is compatible with any CompactPCI chassis with a sub bus that does not drive the lines used by that device Even if the sub bus is capable of driving these lines the PXI device is still compatible as long as those terminals on the sub...

Page 130: ...nism where the user s program is responsible for transferring data Each read or write call in the program initiates the transfer of data Programmed I O is typically used in software timed on demand operations Refer to the Software Timed Generations section of Chapter 5 Analog Output for more information Changing Data Transfer Methods between DMA and IRQ On PCI or PXI M Series devices each measurem...

Page 131: ...wing sections The Analog Input Triggering section of Chapter 4 Analog Input The Analog Output Triggering section of Chapter 5 Analog Output The Counter Triggering section of Chapter 7 Counters Triggering with a Digital Source Your DAQ device can generate a trigger on a digital signal You must specify a source and an edge The digital source can be any of the PFI RTSI or PXI_STAR signals The edge ca...

Page 132: ...39 User Manual 12 2 ni com You also can program your DAQ device to perform an action in response to a trigger from a digital source The action can affect the following Analog input acquisition Analog output generation Counter behavior ...

Page 133: ...sory choices and other information for the NI 6238 and NI 6239 M Series isolated devices To obtain documentation for devices not listed here refer to ni com manuals NI 6238 NI 6238 Pinout Figure A 1 shows the pinout of the NI 6238 For a detailed description of each signal refer to the I O Connector Signal Descriptions section of Chapter 3 Connector Information ...

Page 134: ... P0 1 CTR 0 B 33 PFI 2 P0 2 CTR 1 SRC 15 PFI 3 P0 3 CTR 1 GATE 34 PFI 4 P0 4 CTR 1 AUX 16 PFI 5 P0 5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 AI 0 CAL AI 1 AI GND AI 2 AI 3 AI 4 AI 5 CAL AI 6 AI 7 NC AO 1 PFI 0 P0 0 Input P0 GND PFI 3 P0 3 Input PFI 5 P0 5 Input PFI 6 P1 0 Output PFI 8 P1 2 Output P1 GND AI 0 AI 1 AI 2 AI 3 AI GND AI 4 A...

Page 135: ...screw terminal connector blocks Use an SH37F 37M cable to connect an NI 6238 device to a connector block such as the following CB 37F HVD 37 pin DIN rail screw terminal block UL Recognized derated to 30 Vrms 42 4 Vpk or 60 VDC CB 37FH Horizontal DIN mountable terminal block with 37 screw terminals CB 37FV Vertical DIN mountable terminal block with 37 screw terminals CB 37F LP Low profile terminal ...

Page 136: ...cable UL Listed derated to 30 Vrms 42 4 Vpk or 60 VDC R37F 37M 1 37 pin female to male ribbon I O cable SH37F P 4 37 pin female to pigtails shielded I O cable Custom Cabling and Connectivity Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI 6239 NI 6239 Pinout Figure A 2 shows the pinout of the NI 6239 For a detailed descrip...

Page 137: ... 0 Z 32 PFI 1 P0 1 CTR 0 B 33 PFI 2 P0 2 CTR 1 SRC 15 PFI 3 P0 3 CTR 1 GATE 34 PFI 4 P0 4 CTR 1 AUX 16 PFI 5 P0 5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 AI 0 CAL AI 1 AI GND AI 2 AI 3 AI 4 AI 5 CAL AI 6 AI 7 NC AO 1 PFI 0 P0 0 Input P0 GND PFI 3 P0 3 Input PFI 5 P0 5 Input PFI 6 P1 0 Output PFI 8 P1 2 Output P1 VCC AI 0 AI 1 AI 2 AI 3 ...

Page 138: ...connector blocks Use an SH37F 37M cable to connect an NI 6239 device to a connector block such as the following CB 37F HVD 37 pin DIN rail screw terminal block UL Recognized derated to 30 Vrms 42 4 Vpk or 60 VDC CB 37FH Horizontal DIN mountable terminal block with 37 screw terminals CB 37FV Vertical DIN mountable terminal block with 37 screw terminals CB 37F LP Low profile terminal block with 37 s...

Page 139: ...red Cables In most applications you can use the following cables SH37F 37M x 37 pin female to male shielded I O cable UL Listed derated to 30 Vrms 42 4 Vpk or 60 VDC R37F 37M 1 37 pin female to male ribbon I O cable SH37F P 4 37 pin female to pigtails shielded I O cable Custom Cabling and Connectivity Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about c...

Page 140: ... to AI 1 is high enough the resulting reading can somewhat affect the voltage in AI 0 To circumvent this problem use a voltage follower that has operational amplifiers op amps with unity gain for each high impedance source before connecting to an M Series device Otherwise you must decrease the sample rate for each channel Another common cause of channel crosstalk is due to sampling among multiple ...

Page 141: ...uation 1 convert period convert rate This method allows multiple channels to be sampled relatively quickly in relationship to the overall sample rate providing a nearly simultaneous effect with a fixed delay between channels Analog Output I am seeing glitches on the output signal How can I minimize it When you use a DAC to generate a waveform you may observe glitches on the output signal These gli...

Page 142: ... Why Duplicate count prevention ensures that the counter returns correct data for counter measurement in some applications where a slow or non periodic external source is used Refer to the Duplicate Count Prevention section of Chapter 7 Counters for more information How do I connect counter signals to my M Series device The Default Counter Terminals section of Chapter 7 Counters has information on...

Page 143: ...Instruments Application Engineers make sure every question receives an answer For information about other technical support options in your area visit ni com services or contact your local office at ni com contact Training and Certification Visit ni com training for self paced training eLearning virtual classrooms interactive CDs and Certification program information You also can register for inst...

Page 144: ...com calibration If you searched ni com and could not find the answers you need contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual You also can visit the Worldwide Offices section of ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresse...

Page 145: ... Per º Degree Ω Ohm A A Amperes the unit of electric current A D Analog to Digital Most often used as A D converter AC Alternating current accuracy A measure of the capability of an instrument or sensor to faithfully indicate the value of the measured signal This term is not related to resolution however the accuracy level can never be better than the resolution of the instrument ADE Application d...

Page 146: ...specific level on either an increasing or a decreasing signal positive or negative slope Analog triggering can be implemented either in software or in hardware When implemented in software LabVIEW all data is collected transferred into system memory and analyzed for the trigger condition When analog triggering is implemented in hardware no data is transferred to system memory until the trigger con...

Page 147: ...of a program or algorithm BNC Bayonet Neill Concelman A type of coaxial connector used in situations requiring shielded cable for signal connections and or controlled impedance applications buffer 1 Temporary storage for acquired or generated data 2 A memory device that stores intermediate data between two devices bus buses The group of electrical conductors that interconnect individual circuitry ...

Page 148: ...e rejection The ability of an electronic system to cancel any electronic noise pick up that is common to both the positive and negative polarities of the input leads to the instrument front end Common mode rejection is only a relevant specification for systems having a balanced or differential input common mode signal 1 Any voltage present at the instrumentation amplifier inputs with respect to am...

Page 149: ...pattern which is fed to the DAC DAQ 1 Data acquisition The process of collecting and measuring electrical signals from sensors transducers and test probes or fixtures and inputting them to a computer for processing 2 Data acquisition The process of collecting and measuring the same kinds of electrical signals with A D and or DIO devices plugged into a computer and possibly generating control signa...

Page 150: ...speaks of current many different types of DC measurements are made including DC Voltage DC current and DC power device A plug in data acquisition product card or pad that can contain multiple channels and conversion devices Plug in products PCMCIA cards and devices such as the DAQPad 1200 which connects to your computer parallel port are all examples of DAQ devices SCXI modules are distinct from d...

Page 151: ... and I O devices independently of the CPU driver Software unique to the device or type of device and includes the set of commands the device accepts E edge detection A technique that locates an edge of an analog signal such as the edge of a square wave EEPROM Electrically Erasable Programmable Read Only Memory ROM that can be erased with an electrical signal and reprogrammed Some SCXI modules cont...

Page 152: ...rm data can be stored on the FIFO ahead of time This again reduces the effect of latencies associated with getting the data from system memory to the DAQ device filter A physical device or digital algorithm that selectively removes noise from a signal or emphasizes certain frequency ranges and de emphasizes others Electronic filters include lowpass band pass and highpass types Digital filters can ...

Page 153: ...h Normally a noncurrent carrying circuit intended for safety 3 A common reference point for an electrical system H hardware The physical components of a computer system such as the circuit boards plug in devices chassis enclosures peripherals and cables hardware triggering A form of triggering where you set the start time of an acquisition and gather data at a known position in time relative to a ...

Page 154: ...erchannel delay must be short enough to allow sampling of all the channels in the channel list within the sample interval The greater the interchannel delay the more time the PGIA is allowed to settle before the next channel is sampled The interchannel delay is regulated by ai ConvertClock interface Connection between one or more of the following hardware software and the user For example hardware...

Page 155: ...ve determination of a physical characteristic In practice measurement is the conversion of a physical quantity or observation to a domain where a human being or computer can determine the value measurement device DAQ devices such as the M Series multifunction I O MIO devices SCXI signal conditioning modules and switch modules MHz Megahertz A unit of frequency 1 MHz 106 Hz 1 000 000 Hz micro μ The ...

Page 156: ...tiplexer A set of semiconductor or electromechanical switches arranged to select one of many inputs to a single output The majority of DAQ cards have a multiplexer on the input which permits the selection of one of many channels at a time A switching device with multiple inputs that sequentially connects each of its inputs to its output typically at high speeds in order to measure several signals ...

Page 157: ...pansion bus architecture originally developed by Intel to replace ISA and EISA It offers a theoretical maximum transfer rate of 132 MB s period The period of a signal most often measured from one zero crossing to the next zero crossing of the same slope The period of a signal is the reciprocal of its frequency in Hz Period is designated by the symbol T periods The number of periods of a signal PFI...

Page 158: ...ss PCI Express eXtensions for Instrumentation The PXI implementation of PCI Express a scalable full simplex serial bus standard that operates at 2 5 Gbps and offers both asynchronous and isochronous data transfers PXI_STAR A special set of trigger lines in the PXI backplane for high accuracy device synchronization with minimal latencies on each PXI slot Only devices in the PXI Star controller Slot...

Page 159: ...tional Instruments timing bus that connects DAQ devices directly by means of connectors on top of the devices for precise synchronization of functions S s Seconds S Samples sample counter The clock that counts the output of the channel clock in other words the number of samples taken On devices with simultaneous sampling this counter counts the output of the scan clock and hence the number of scan...

Page 160: ...forms they are most often converted to electronic form for measurement single trigger mode When the arbitrary waveform generator goes through the staging list only once single buffered Describes a device that acquires a specified number of samples from one or more channels and returns the data when the acquisition is complete single ended input A circuit that responds to the voltage on one input t...

Page 161: ...NI DAQmx a collection of one or more channels timing and triggering and other properties that apply to the task itself Conceptually a task represents a measurement or generation you want to perform TC See terminal count terminal An object or region on a node through which data passes terminal count The highest value of a counter tgh Gate hold time tgsu Gate setup time tgw Gate pulse width Timebase...

Page 162: ... period tsp Source pulse width TTL Transistor Transistor Logic A digital circuit composed of bipolar transistors wired in a certain manner A typical medium speed digital technology Nominal TTL logic levels are 0 and 5 V U USB Universal Serial Bus A 480 Mbit s serial bus with up to 12 Mbps bandwidth for connecting computers to keyboards printers and other peripheral devices USB 2 0 retains compatib...

Page 163: ...ation G 19 NI 6238 6239 User Manual Vs Signal source voltage virtual channel See channel W waveform 1 The plot of the instantaneous amplitude of a signal as a function of time 2 Multiple voltage readings taken at a specific sampling rate ...

Page 164: ... signal 4 17 AI Start Trigger signal 4 21 AI timing signals 4 12 ai ConvertClock 4 18 ai ConvertClockTimebase 4 21 ai HoldCompleteEvent 4 21 ai PauseTrigger 4 24 ai ReferenceTrigger 4 22 ai SampleClock 4 15 ai SampleClockTimebase 4 17 ai StartTrigger 4 21 analog input analog to digital converter 4 2 charge injection B 1 circuitry 4 1 crosstalk when sampling multiple channels B 1 data acquisition m...

Page 165: ...terface 11 1 RTSI 10 3 C cables 2 4 A 3 A 6 choosing for your device 1 2 custom 2 4 calibration certificate NI resources C 2 calibration circuitry 2 3 cascading counters 7 33 changing data transfer methods between DMA and IRQ 11 4 channel Z behavior 7 17 channels sampling with AI Sample Clock and AI Convert Clock B 2 charge injection B 1 circular buffered acquisition 4 11 clock 10 MHz reference 10...

Page 166: ... 7 3 filters 7 33 generation 7 21 input applications 7 3 other features 7 33 output applications 7 21 prescaling 7 34 pulse train generation 7 23 retriggerable single pulse generation 7 22 simple pulse generation 7 21 single pulse generation 7 21 single pulse generation with start trigger 7 21 synchronization modes 7 38 timing signals 7 26 triggering 7 32 troubleshooting B 3 counting edges 7 3 cro...

Page 167: ... NI DAQmx 7 38 example 7 37 troubleshooting B 3 E edge counting 7 3 buffered 7 4 non cumulative buffered 7 5 sample clock 7 4 edge separation measurement buffered two signal 7 20 single two signal 7 19 enabling duplicate count prevention in NI DAQmx 7 38 encoders quadrature 7 16 encoding X1 7 16 X2 7 17 X4 7 17 equivalent time sampling 7 25 examples NI resources C 1 exporting timing output signals...

Page 168: ...terminals as 8 2 using RTSI terminals as 10 6 installation hardware 1 1 NI DAQ 1 1 other software 1 1 instrument drivers NI resources C 1 interface bus 11 1 interrupt request as a transfer method 11 4 IRQ as a transfer method 11 4 changing data transfer methods 11 4 isolated DAQ devices 9 1 benefits 9 3 common mode noise 9 3 isolation barrier 4 2 5 2 isolators 9 1 K KnowledgeBase C 1 L LabVIEW doc...

Page 169: ...tation xv NI DAQmx enabling duplicate count prevention 7 38 non buffered hardware timed acquisitions 4 11 generations 5 3 non cumulative buffered edge counting 7 5 O other internal source mode 7 39 other software 1 1 output signals glitches troubleshooting B 2 outputs using RTSI as 10 5 overview 2 1 P pause trigger 7 32 period measurement 7 7 buffered 7 8 single 7 8 PFI 8 1 connecting input signal...

Page 170: ...signals 10 6 S sample clock edge counting 7 4 scanning speed 4 9 semi period measurement 7 9 buffered 7 10 single 7 9 sensors 2 3 settings analog input ground reference 4 5 short high quality cabling 4 8 signal descriptions 3 1 signal routing RTSI bus 10 3 signals AI Convert Clock 4 18 AI Convert Clock Timebase 4 21 AI Hold Complete Event 4 21 AI Pause Trigger 4 24 AI Reference Trigger 4 22 AI Sam...

Page 171: ...sing PFI terminals as 8 3 support technical C 1 synchronization modes 7 38 80 MHz source 7 39 external source 7 40 other internal source 7 39 synchronizing multiple devices 10 3 synchronous counting mode 7 35 T technical support xviii C 1 terminals default counter 7 31 Timebase 100 kHz 10 2 20 MHz 10 2 80 MHz 10 2 timing output signals exporting using PFI terminals 8 3 training xvii training and c...

Page 172: ...I Os 8 3 as timing input 8 2 to export timing output signals 8 3 using RTSI as outputs 10 5 terminals as timing input signals 10 6 using short high quality cabling 4 8 V V I Converter 5 1 W waveform generation signals 5 5 Web resources C 1 wiring field 4 11 X X1 encoding 7 16 X2 encoding 7 17 X4 encoding 7 17 ...

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