Chapter 4 Signal Connections
DAQCard E Series User Manual
4-34
National Instruments Corporation
The ADC switches to hold mode within 60 ns of the selected edge. This
hold-mode delay time is a function of temperature and does not vary
from one conversion to the next. Separate the CONVERT* pulses by
at least one conversion period.
The sample interval counter on the DAQCard normally generates the
CONVERT* signal unless you select some external source. The
counter is started by the STARTSCAN signal and continues to count
down and reload itself until the scan is finished. It then reloads itself in
readiness for the next STARTSCAN pulse.
A/D conversions generated by either an internal or external
CONVERT* signal are inhibited unless they occur within a data
acquisition sequence. Scans occurring within a data acquisition
sequence may be gated by either the hardware (AIGATE) signal or
software command register gate.
AIGATE Signal
Any PFI pin can externally input the AIGATE signal, which is not
available as an output on the I/O connector. The AIGATE signal can
mask off scans in a data acquisition sequence. You can configure the
PFI pin you select as the source for the AIGATE signal in either the
level-detection or edge-detection mode. You can configure the polarity
selection for the PFI pin for either active high or active low.
In the level-detection mode if AIGATE is active, the STARTSCAN
signal is masked off and no scans can occur. In the edge-detection
Figure 4-21.
CONVERT* Output Signal Timing
t
w
t
w
= 50-100 ns
