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Chapter 4

Digital I/O

©

National Instruments Corporation

4-5

Analog Output Series User Manual

I/O Protection

To minimize the risk of damaging the DIO and PFI terminals of your
device, follow these guidelines.

•

If you configure a PFI or DIO line as an output, do not connect it to any
external signal source, ground signal, or power supply.

•

If you configure a PFI or DIO line as an output, understand the current
requirements of the load connected to these signals. Do not exceed the
specified current output limits of the DAQ device. NI has several signal
conditioning solutions for digital applications requiring high current
drive.

•

If you configure a PFI or DIO line as an input, do not drive the line with
voltages outside of its normal operating range. The PFI or DIO lines
have a smaller operating range than the AI signals.

•

Treat the DAQ device as you would treat any static sensitive device.
Always properly ground yourself and the equipment when handling
the DAQ device or connecting to it.

Power-On States

At system startup and reset, the hardware sets all PFI and DIO lines to
high-impedance inputs. The DAQ device does not drive the signal high or
low. Each line has a weak pull-up resistor connected to it, as described in
the specifications of your device.

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Summary of Contents for DAQCard-6715

Page 1: ...DAQ Analog Output Series Analog Output Series User Manual NI 6711 6713 DAQCard 6715 NI 6722 6723 and NI 6731 6733 Devices Analog Output Series User Manual June 2007 370735E 01 ...

Page 2: ... Lebanon 961 0 1 33 28 28 Malaysia 1800 887710 Mexico 01 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 0800 553 322 Norway 47 0 66 90 76 60 Poland 48 22 3390150 Portugal 351 210 311 210 Russia 7 495 783 6851 Singapore 1800 226 5886 Slovenia 386 3 425 42 00 South Africa 27 0 11 805 8197 Spain 34 91 640 0085 Sweden 46 0 8 587 895 00 Switzerland 41 56 2005151 Taiwan 886 02 2377 2222 Thailand ...

Page 3: ... photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the same NI software is protected by copyright and other intellectual property laws Where NI software may be used to reproduce software...

Page 4: ...nt of Communications DOC Changes or modifications not expressly approved by NI could void the user s authority to operate the equipment under the FCC Rules Class A Federal Communications Commission This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against ha...

Page 5: ... 6 Field Wiring Considerations 1 6 Programming Devices in Software 1 7 Chapter 2 I O Connector 68 Pin AO I O Connector Pinouts 2 1 68 68 Pin Extended AO I O Connector Pinout 2 5 Terminal Name Equivalents 2 7 I O Connector Signal Descriptions 2 9 5 V Power Source 2 12 Chapter 3 Analog Output Analog Output Fundamentals 3 1 Analog Output Circuitry 3 1 DACs 3 1 DAC FIFO 3 1 AO Sample Clock 3 2 Referen...

Page 6: ...ng an Internal Source 3 9 Using an External Source 3 9 Outputting the AO Sample Clock Signal 3 9 Other Timing Requirements 3 10 AO Sample Clock Timebase Signal 3 11 Master Timebase Signal 3 11 Getting Started with AO Applications in Software 3 12 Chapter 4 Digital I O Static DIO 4 2 Digital Waveform Generation NI 6731 6733 Only 4 2 DO Sample Clock Signal NI 6731 6733 Only 4 2 Using an Internal Sou...

Page 7: ... 6 Counter 1 Source Signal 5 7 Counter 1 Gate Signal 5 7 Counter 1 Internal Output Signal 5 8 Counter 1 Up Down Signal 5 9 Frequency Output Signal 5 9 Master Timebase Signal 5 9 Getting Started with Counter Applications in Software 5 10 Chapter 6 Programmable Function Interfaces PFI Inputs 6 1 Outputs 6 2 Chapter 7 Digital Routing Timing Signal Routing 7 1 Connecting Timing Signals 7 3 Routing Sig...

Page 8: ...fer Methods 9 2 Direct Memory Access DMA 9 2 Interrupt Request IRQ 9 2 Programmed I O 9 2 Changing Data Transfer Methods between DMA and IRQ 9 2 Chapter 10 Triggering Triggering with a Digital Source 10 1 Appendix A Device Specific Information Appendix B Troubleshooting Appendix C Technical Support and Professional Services Glossary Index ...

Page 9: ...is icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash When this symbol is marked on a product refer to the Read Me First Safety and Radio Frequency Interference document for information about precautions to take When symbol is marked on a product it denotes a warning advising you to take precautions to avoid electrical shock When symbol is m...

Page 10: ...DAQmx for Windows software how to install your NI DAQmx supported DAQ device and how to confirm that your device is operating properly Select Start All Programs National Instruments NI DAQ DAQ Getting Started Guide The NI DAQ Readme lists which devices are supported by this version of NI DAQ Select Start All Programs National Instruments NI DAQ NI DAQ Readme The NI DAQmx Help contains general info...

Page 11: ...ents NI DAQmx Base Documentation Getting Started Guide Getting Started with NI DAQmx Base for Linux and Mac Users describes how to install your NI DAQmx Base software your NI DAQmx Base supported DAQ device and how to confirm that your device is operating properly on your Mac Linux machine The NI DAQmx Base Readme lists which devices are supported by this version of NI DAQmx Base Select Start All ...

Page 12: ...ow to take an NI DAQmx measurement in LabVIEW using the DAQ Assistant VI and Function Reference Measurement I O VIs and Functions Describes the LabVIEW NI DAQmx VIs and properties Taking Measurements Contains the conceptual and how to information you need to acquire and analyze measurement data in LabVIEW including common measurements measurement fundamentals NI DAQmx key concepts and device consi...

Page 13: ...sual Studio NET select Measurement Studio Measurement Studio Reference To create an application in Visual C Visual C or Visual Basic NET follow these general steps 1 In Visual Studio NET select File New Project to launch the New Project dialog box 2 Find the Measurement Studio folder for the language you want to create a program in 3 Choose a project type You add DAQ tasks as a part of this step A...

Page 14: ...Device Documentation and Specifications The NI 6711 6713 DAQCard 6715 Specifications contains all specifications for the NI 6711 NI 6713 and NI DAQCard 6715 AO Series devices The NI 6722 6723 Specifications contains all specifications for the NI 6722 and NI 6723 AO Series devices The NI 6731 6733 Specifications contains all specifications for the NI 6731 and NI 6733 AO Series devices NI DAQmx incl...

Page 15: ...se documents at ni com manuals DAQ specifications and some DAQ manuals are available as PDFs You must have Adobe Acrobat Reader with Search and Accessibility 5 0 5 or later installed to view the PDFs Refer to the Adobe Systems Incorporated Web site at www adobe com to download Acrobat Reader Refer to the National Instruments Product Manuals Library at ni com manuals for updated documentation resou...

Page 16: ...itioning cables that connect the various devices to the accessories the analog output device and the programming software Refer to the Using Accessories with Devices section for a list of devices and their compatible accessories Figure 1 1 DAQ System Setup 1 Sensors and Transducers 2 Terminal Block Accessory 3 Cable Assembly 4 DAQ Device 5 Personal Computer 2 4 3 5 1 V HV mV ...

Page 17: ...of the following three timing groups AI two 24 bit two 16 bit counters not used on AO Series devices AO three 24 bit one 16 bit counter General purpose counter timer functions two 24 bit counters You can independently configure the groups for timing resolutions of 50 ns or 10 μs With the DAQ STC you can interconnect a wide variety of internal timing signals to other internal blocks The interconnec...

Page 18: ...are stored in the EEPROM of the device as calibration constants Before performing a measurement these constants are read out of the EEPROM and are used to adjust the calibration hardware on the device NI DAQ determines when this is necessary and does it automatically If you are not using NI DAQ you must load these values yourself You can calibrate AO Series devices in the following two ways Intern...

Page 19: ...onnector blocks with screw terminals I O connector cables RTSI bus cables Low channel count digital signal conditioning modules devices and accessories For more specific information about these products refer to ni com The following sections contain information on how to select accessories for your AO Series device Using Accessories with Devices Table 1 1 Accessories and Cables for Analog Output D...

Page 20: ...CB 68 TB 68 NI 6731 6733 SH68 68 EP BNC 2110 CB 68LP CB 68LPR SCB 68 TB 68 Table 1 2 Overview of DAQ Accessories for Analog Output Devices Accessory Description BNC 2110 BNC connector block for 68 pin analog output devices BNC 2115 BNC connector block for extended I O CB 68LP CB 68LPR 68 pin low cost screw terminal block SCB 68 68 pin shielded screw terminal block with breadboard areas TB 68 68 pi...

Page 21: ...or Board Mating Connectors To access this document go to ni com info and enter the info code rdsmbm Field Wiring Considerations The following recommendations apply for all signal connections to the AO Series device Separate the signal lines of the AO Series device from high current or high voltage lines These lines can induce currents in or voltages on the signal lines of the AO Series device if t...

Page 22: ...classes attributes and properties for creating applications for your device NI DAQ 7 x includes two NI DAQ drivers Traditional NI DAQ Legacy and NI DAQmx Each driver has its own API hardware configuration and software configuration Refer to the DAQ Getting Started Guide for more information about the two drivers Traditional NI DAQ Legacy and NI DAQmx each include a collection of programming exampl...

Page 23: ... Studio directory contains a link to the ActiveX control examples for use with Measurement Studio NI DAQ Examples VBasic directory contains the examples not associated with Measurement Studio NI DAQmx examples for ANSI C are in the NI DAQ Examples DAQmx ANSI C Dev directory Traditional NI DAQ Legacy examples for ANSI C are in the NI DAQ Examples VisualC directory For additional examples refer to z...

Page 24: ...s I O connectors Note Some hardware accessories may not yet reflect the NI DAQmx terminal names If you are using an AO Series device in Traditional NI DAQ Legacy refer to Table 2 1 for the Traditional NI DAQ Legacy signal names 68 Pin AO I O Connector Pinouts Figure 2 1 Figure 2 2 and Figure 2 3 show the pinouts of 68 pin AO Series devices ...

Page 25: ...GND AO 3 AO GND AO GND NC AO GND NC AO GND AO GND NC AO GND D GND PFI 8 CTR 0 SOURCE PFI 7 CTR 1 OUT PFI 4 CTR 1 GATE PFI 3 CTR 1 SOURCE PFI 2 D GND D GND D GND EXT STROBE NC P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AO GND AO 2 AO GND AO GND NC AO GND NC AO GND AO GND NC AO GND AO GND NC 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19...

Page 26: ...1 AO 0 AO GND AO GND AO 3 AO GND AO GND AO 5 AO GND AO 6 AO GND AO GND NC AO GND D GND PFI 8 CTR 0 SOURCE PFI 7 CTR 1 OUT PFI 4 CTR 1 GATE PFI 3 CTR 1 SOURCE PFI 2 D GND D GND D GND EXT STROBE NC P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AO GND AO 2 AO GND AO GND AO 4 AO GND NC AO GND AO GND AO 7 AO GND AO GND NC 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 1...

Page 27: ...ND P0 4 CAL AO 1 AO 0 AO GND AO GND AO 3 AO GND AO GND AO 5 AO GND AO 6 AO GND AO GND NC AO GND D GND PFI 8 CTR 0 SOURCE PFI 7 CTR 1 OUT PFI 4 CTR 1 GATE PFI 3 CTR 1 SOURCE PFI 2 D GND D GND D GND EXT STROBE NC P0 3 P0 7 P0 2 D GND P0 5 P0 0 D GND AO GND AO GND AO GND AO 2 AO GND AO GND AO 4 AO GND NC AO GND AO GND AO 7 AO GND AO GND NC 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 4...

Page 28: ...National Instruments Corporation 2 5 Analog Output Series User Manual 68 68 Pin Extended AO I O Connector Pinout The NI 6723 has two 68 pin I O connectors Figure 2 4 shows the pin assignments for both connectors on the NI 6723 ...

Page 29: ...C AO GND AO GND AO 7 AO GND AO GND NC 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68 NC NC NC NC NC NC NC NC NC AO 31 AO 30 AO GND AO 28 AO 27 AO GND AO 25 AO 24 AO GND AO 22 AO 21 AO GND NC AO 19 AO 18 AO GND AO 16 AO 15 AO GND AO 13 AO 12 AO GND AO 1...

Page 30: ...tware products The revised terminal names used in this document are usually similar to the names they replace Refer to Table 2 1 for a list of Traditional NI DAQ Legacy terminal names and their NI DAQmx equivalents Table 2 1 Terminal Name Equivalents Traditional NI DAQ Legacy NI DAQmx ACH AI ACH AI ACH AI ACHGND AI GND AIGND AI GND AISENSE AI SENSE AISENSE2 AI SENSE 2 AOGND AO GND CONVERT AI CONV ...

Page 31: ...OURCE CTR 1 SOURCE or CTR 1 SRC PA PB PC P0 P1 P2 PFI PFI PFI_ PFI SCANCLK AI HOLD COMP or AI HOLD SISOURCE AI Sample Clock Timebase STARTSCAN AI SAMP CLK or AI SAMP TRIG1 AI START TRIG or AI START TRIG2 AI REF TRIG or REF TRIG UISOURCE AO Sample Clock Timebase UPDATE AO SAMP CLK or AO SAMP WFTRIG AO START TRIG or AO START Table 2 1 Terminal Name Equivalents Continued Traditional NI DAQ Legacy NI ...

Page 32: ... 0 7 D GND Input or Output Digital I O signals These pins drive and receive digital signals P0 6 and P0 7 can control the up down signal of Counters 0 and 1 respectively 5 V D GND Output 5 VDC source These pins provide 5 V power AO EXT REF D GND Input External Reference This pin is the external reference input for the AO circuitry AI HOLD COMP D GND Output AI Hold Complete This pin is used to cont...

Page 33: ...hapter 5 Counters CTR 1 OUT D GND Output Counter 1 Output Signal This pin emits the Ctr1InternalOutput signal For more information refer to Chapter 5 Counters PFI 5 AO SAMP CLK D GND Input PFI 5 As an input this pin is a general purpose input terminal Output AO Sample Clock Signal As an output this pin emits the ao SampleClock signal A high to low transition of this signal indicates a new sample i...

Page 34: ...ault input for the Ctr0Gate signal Output Counter 0 Gate Signal As an output this pin emits the Ctr0Gate signal This signal reflects the actual gate signal connected to Counter 0 For more information refer to Chapter 5 Counters CTR 0 OUT D GND Input Counter 0 Output Signal As an input this pin can be used to route signals directly to the RTSI bus For more information refer to Chapter 5 Counters Ou...

Page 35: ...to D GND to power external circuitry A self resetting fuse protects the supply from overcurrent conditions The fuse resets automatically within a few seconds after the overcurrent condition is removed Power rating 4 65 to 5 25 VDC at 1 A 0 75 A for the DAQCard 6715 The 5 V line on the connector of the DAQCard 6715 is fused at 0 75 A However the actual current available can be limited below this va...

Page 36: ...log Output Circuitry DACs Digital to analog converters DACs convert digital codes to analog voltages DAC FIFO The DAC FIFO enables analog output waveform generation It is a first in first out FIFO memory buffer between the computer and the DACs that allows you to download all the points of a waveform to your board without host computer interaction AO 0 AO 1 DAC0 DAC1 AO FIFO AO Data AO Sample Cloc...

Page 37: ...ange on a voltage output on your AO Series device as follows LSB output voltage range 2resolution of your device where the output range is determined by your reference selection Using AO EXT REF you can reduce the output voltage range and lower the LSB the minimum allowed voltage change For more information on using the AO External Reference signal refer to the Reference Selection NI 6711 6713 DAQ...

Page 38: ...transitions This uniform glitch energy appears as a multiple of the update rate in the frequency spectrum This reglitch circuit does not eliminate the glitches it only makes them more uniform in size By default reglitching is disabled for all channels however you can use NI DAQ to independently enable reglitching for each channel Minimizing Glitches on the Output Signal When you use a DAC to gener...

Page 39: ...ween samples can be deterministic Hardware timed generations can use hardware triggering For more information refer to Chapter 10 Triggering Hardware timed operations can be buffered or non buffered A buffer is a temporary storage in computer memory for acquired or to be generated samples Buffered In a buffered generation data is moved from a PC buffer to the DAQ device s onboard FIFO using DMA or...

Page 40: ...r must fit within the FIFO size The advantage of using FIFO regeneration is that it does not require communication with the main host memory when the operation is started thereby preventing any problems that may occur due to excessive bus traffic With non regeneration old data will not be repeated New data must be continually written to the buffer If the program does not write new data to the buff...

Page 41: ...AO Sample Clock that causes all AO channels to update simultaneously Figure 3 3 summarizes the timing and routing options provided by the analog output timing engine Figure 3 3 Analog Output Engine Routing Options Load Load V OUT V OUT AO GND AO 1 Analog Output Channels AO Series Device AO 0 Channel 1 Channel 0 I O Connector Vref External Reference Signal Optional AO EXT REF RTSI 7 20 MHz Timebase...

Page 42: ...l signal on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 for more information Figure 3 4 shows the timing requirements of the ao StartTrigger digital source Figure 3 4 ao StartTrigger Timing Requirements Outputting the AO Start Trigger Signal You can configure the PFI 6 AO START TRIG pin to output the ao StartTrigger signal The output pin r...

Page 43: ...use ao Pause Trigger specify a source and a polarity The source can be an external signal connected to any PFI or RTSI 0 6 pin The source can also be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 for more information Also specify whether the samples are paused when ao PauseTrigger is at a logic high o...

Page 44: ...he NI DAQmx Help or the LabVIEW Help in version 8 0 for more information Using an External Source You can use a signal connected to any PFI or RTSI 0 6 pin as the source of ao SampleClock Figure 3 6 shows the timing requirements of the ao SampleClock source Figure 3 6 ao SampleClock Timing Requirements Outputting the AO Sample Clock Signal You can configure the PFI 5 AO SAMP CLK pin to output the ...

Page 45: ...e The ao StartTrigger signal starts this counter It is stopped automatically by hardware after a finite acquisition completes or manually through software When using an internally generated ao SampleClock in NI DAQmx you can also specify a configurable delay from the ao StartTrigger to the first ao SampleClock pulse By default this delay is two ticks of the ao SampleClockTimebase signal Figure 3 8...

Page 46: ...al then you should use the ao SampleClock signal rather than the ao SampleClockTimebase If you do not specify an external sample clock timebase NI DAQ uses the Onboard Clock Figure 3 9 shows the timing requirements for the ao SampleClockTimebase signal Figure 3 9 ao SampleClockTimebase Timing Requirements The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There...

Page 47: ... Integration Bus RTSI for more information on which signals are available through RTSI Figure 3 10 shows the timing requirements for MasterTimebase Figure 3 10 MasterTimebase Timing Requirements Getting Started with AO Applications in Software You can use the AO Series device in the following analog output applications Single Point Generation Finite Generation Continuous Generation Waveform Genera...

Page 48: ...y High speed digital waveform acquisition NI 6731 6733 only Figure 4 1 shows the circuitry of one DIO line Figure 4 1 AO Series Digital I O Block Diagram The DIO terminals are named P0 0 7 on the I O connector The voltage input and output levels and the current drive levels of the DIO lines are listed in the specifications of your device DO Sample Clock DO Waveform Generation FIFO DO x Direction C...

Page 49: ...ible sources The DO waveform generation FIFO stores the digital samples The NI 6731 6733 can use DMA transfers to move data from the system memory to the DO waveform generation FIFO The DAQ device moves samples from the FIFO to the DIO terminals on each rising or falling edge of a clock signal do SampleClock For more information on DMA transfers refer to the Direct Memory Access DMA section of Cha...

Page 50: ...ion You must ensure that the time between two active edges of the do SampleClock is not too short If the time is too short the DO waveform generation FIFO is not able to read the next sample fast enough Digital Waveform Acquisition NI 6731 6733 Only The NI 6731 6733 can acquire digital waveforms This behavior is also referred to as correlated digital I O because there is no dedicated clock source ...

Page 51: ...t software Using an Internal Source To use di SampleClock with an internal source specify the signal source and the polarity of the signal The source can be any of the following signals AO Sample Clock Counter 0 Out Program the DAQ device to sample the DIO terminals on the rising edge or falling edge of di SampleClock Using an External Source You can use a signal connected to any RTSI 0 6 pin as t...

Page 52: ...NI has several signal conditioning solutions for digital applications requiring high current drive If you configure a PFI or DIO line as an input do not drive the line with voltages outside of its normal operating range The PFI or DIO lines have a smaller operating range than the AI signals Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the ...

Page 53: ...nd sensing external device states such as the state of the switch shown in the figure Digital output applications include sending TTL signals and driving external devices such as the LED shown in the figure Figure 4 2 Digital I O Signal Connections Caution Exceeding the maximum input voltage ratings which are listed in the specifications of each AO Series device can damage the DAQ device and the c...

Page 54: ... Digital Output Digital Waveform Generation Digital Waveform Acquisition NI 6731 6733 only For correlated DIO examples in Traditional NI DAQ Legacy refer to the KnowledgeBase document What Devices Other Than M Series Can Perform Correlated Digital I O To access this document go to ni com info and enter the info code rdwd7m Note For more information about programming digital I O applications and tr...

Page 55: ...ing Counters support two different triggering actions start and pause Only digital triggers can initiate these actions For more information on digital triggers refer to the Triggering with a Digital Source section of Chapter 10 Triggering Start Trigger A start trigger begins a finite or continuous pulse generation When a continuous generation is initiated the pulses continue to generate until you ...

Page 56: ... on counter timing signals Counter Timing Summary Figure 5 2 shows the timing requirements for the gate and source input signals and the timing specifications for the output signals on your device Figure 5 2 Gate and Source Input Timing Requirements The gate and out signal transitions shown in Figure 5 2 are referenced to the rising edge of the source signal This timing diagram assumes that the co...

Page 57: ...lts in an uncertainty of one source clock period with respect to unsynchronized gating sources The output timing parameters are referenced to the signal at the source input or to one of the internally generated clock signals on your device Figure 5 2 shows the out signal referenced to the rising edge of a source signal Any out signal state changes occur within 80 ns after the rising or falling edg...

Page 58: ...al Counter 0 Gate Signal You can select any PFI as well as many other internal signals like the Counter 0 Gate Ctr0Gate signal The Ctr0Gate signal is configured in edge detection or level detection mode depending on the application performed by the counter The gate signal can perform many different operations including starting and stopping the counter generating interrupts and saving the counter ...

Page 59: ...lse on TC and toggle output polarity on TC The output polarity is software selectable for both options Figure 5 5 shows the behavior of the Ctr0InternalOutput signal Figure 5 5 Ctr0InternalOutput Signal Behavior You can use Ctr0InternalOutput in the following applications In pulse generation mode the counter drives Ctr0InternalOutput with the generated pulses To enable this behavior software confi...

Page 60: ...TR 0 OUT is set to high impedance at startup Figure 5 6 shows the relationship of CTR 0 OUT and Ctr0InternalOutput Figure 5 6 CTR 0 OUT and Ctr0InternalOutput Counter 0 Up Down Signal You can externally input this signal on the P0 6 pin but it is not available as an output on the I O connector When you enable externally controlled count direction Counter 0 counts down when this pin is at a logic l...

Page 61: ...ming Requirements The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency For most applications unless you select an external source the 20MHzTimebase signal or the 100kHzTimebase signal generates the Ctr1Source signal Counter 1 Gate Signal You can select any PFI as well as many other internal signals like the Counter 1 Gate Ctr1Gate si...

Page 62: ...rity is software selectable for both options Figure 5 9 shows the behavior of the Ctr1InternalOutput signal Figure 5 9 Ctr1InternalOutput Behavior You can use Ctr1InternalOutput in the following applications In pulse generation mode the counter drives Ctr1InternalOutput with the generated pulses To enable this behavior software configures the counter to toggle Ctr1InternalOutput on TC Ctr1Internal...

Page 63: ...nput clock by the numbers one through 16 The input clock of the frequency generator is software selectable from the internal 10 MHz and 100 kHz timebases The output polarity is software selectable This output is set to high impedance at startup Master Timebase Signal The Master Timebase MasterTimebase signal or Onboard Clock is the timebase from which all other internally generated clocks and time...

Page 64: ...Counting Edges Frequency Measurement Period Measurement Pulse Width Measurement Semi Period Measurement Pulse Generation You can perform these measurements through programmed I O interrupt or DMA data transfer mechanisms The measurements can be finite or continuous in duration Some of the applications also use start triggers and pause triggers Note For more information about programming counter ap...

Page 65: ...ing When using the PFI pin as an input you can individually configure each PFI for edge or level detection and for polarity selection You can use the polarity selection for any of the timing signals but the edge or level detection depends upon the particular timing signal being controlled The detection requirements for each timing signal are listed within the section that discusses that signal In ...

Page 66: ...put PFI pins are labeled with the timing signal that can be output on it For example PFI 8 is labeled PFI 8 CTR 0 Source The following timing signals can be output on PFI pins AO Start Trigger Signal AO Sample Clock Signal Counter 0 Source Signal Counter 0 Gate Signal Counter 1 Source Signal Counter 1 Gate Signal Caution Do not drive a PFI signal externally when it is configured as an output For m...

Page 67: ...escription of which routes are possible on your device click the Device Routes tab in Measurement Automation Explorer Timing Signal Routing The DAQ STC provides a flexible interface for connecting timing signals to other devices or external circuitry Your device uses the RTSI bus to interconnect timing signals between devices and it uses the programmable function interface PFI pins on the I O conn...

Page 68: ... configurable For example the signal routing multiplexer for controlling the ao SampleClock signal is shown in Figure 7 1 Figure 7 1 Signal Routing Multiplexer on Analog Output Devices Figure 7 1 shows that you can generate the ao SampleClock signal from a number of sources including the external signals RTSI 0 6 PFI 0 9 and the internal signals Onboard Clock and Ctr1InternalOutput Here the Onboar...

Page 69: ...your device can damage your device and the computer NI is not liable for any damage resulting from signal connections that exceed the maximum ratings The 10 programmable function interface PFI pins labeled PFI 0 9 route all external control over the timing of the device These lines serve as connections to virtually all internal timing signals These PFIs are bidirectional As outputs they are not pr...

Page 70: ...or more information about routing signals in software refer to the NI DAQmx Help Table 7 1 Signal Routing in Software Language Program Function LabVIEW NI DAQmx DAQmx Export Signal vi and DAQmx Connect Terminals vi Traditional NI DAQ Legacy Route Signal vi C NI DAQmx Export_Signal and DAQmx_Connect_Terminals Traditional NI DAQ Legacy Select_Signal D GND PFI 0 PFI 2 PFI 2 Source I O Connector AO Se...

Page 71: ...mation To access this document go to ni com info and enter the info code rdrtcp Note The NI DAQCard 6715 does not use the RTSI bus RTSI Triggers The seven RTSI trigger lines on the RTSI bus provide a flexible interconnection scheme for devices sharing the RTSI bus These bidirectional lines can drive or receive any of the timing and triggering signals shown below directly to or from the trigger bus...

Page 72: ... PCI RTSI bus signal connection Figure 8 1 PCI RTSI Bus Signal Connection RTSI Bus Connector Switch RTSI Switch RTSI Trigger 7 Trigger 0 6 DAQ STC Ctr0 Source Ctr0Gate Ctr0InternalOutput Ctr0Out Ctr1Source Ctr1Gate 20MHzTimebase MasterTimebase ao StartTrigger ao PauseTrigger ao SampleClockTimebase ao SampleClock ...

Page 73: ...imebase to generate the necessary timing signals for controlling DAC updates or general purpose signals at the I O connector This timebase is also called the Master Timebase or Onboard Clock For more information refer to the Master Timebase Signal section of Chapter 3 Analog Output The AO Series device can use either its internal 20MHzTimebase signal or a timebase received over the RTSI bus The ti...

Page 74: ...ple Devices With the RTSI bus and the routing capabilities of the DAQ STC there are several ways to synchronize multiple devices depending on your application NI recommends that you use a common timebase as the MasterTimebase signal and share any common triggers in the application One device is designated as the master device and all other devices are designated as slave devices The 20MHzTimebase ...

Page 75: ...andard CompactPCI chassis you cannot use PXI specific functions but you can still use the basic plug in device functions For example the RTSI bus on a PXI AO Series device is available in a PXI chassis but not in a CompactPCI chassis The CompactPCI specification permits vendors to develop sub buses that coexist with the basic PCI interface on the CompactPCI bus Compatible operation is not guarante...

Page 76: ...data transfer speed is tightly coupled to the rate at which the CPU can service the interrupt requests If you are using interrupts to acquire data at a rate faster than the rate the CPU can service the interrupts your systems may start to freeze Programmed I O Programmed I O is a data transfer mechanism where the user s program is responsible for transferring data Each read or write call in the pr...

Page 77: ...formation refer to the Analog Output Triggering section of Chapter 3 Analog Output and the Counter Triggering section of Chapter 5 Counters Triggering with a Digital Source Your DAQ device can generate a trigger on a digital signal You must specify a source and an edge The digital source can be any of the PFI or RTSI 0 6 signals The edge can be either the rising edge or falling edge of the digital...

Page 78: ... DAQ device to perform an action in response to a trigger from a digital source The action can affect analog output generation counter behavior For more information refer to the Analog Output Triggering section of Chapter 3 Analog Output and the Counter Triggering section of Chapter 5 Counters ...

Page 79: ... analog output AO digital I O DIO and timing I O TIO devices for PCI bus computers The NI 6711 features four AO channels with 12 bit resolution eight lines of TTL compatible DIO two 24 bit counter timers for TIO a 68 pin AO I O connector The NI 6713 features eight AO channels with 12 bit resolution eight lines of TTL compatible DIO two 24 bit counter timers for TIO a 68 pin AO I O connector Becaus...

Page 80: ...connector and the NI 6713 has eight channels of voltage output at the I O connector The reference for the AO circuitry is software selectable per channel The reference can be either internal or external but the range is always bipolar This means that you can generate signals up to 10 V with internal reference selected or EXT REF voltage with external reference selected ...

Page 81: ...nput Timing Control Digital I O Trigger Counter Timing I O RTSI Bus Interface DMA IRQ Bus Interface Address Data Address Control EEPROM Control AO Control Calibration Control DMA IRQ Register Decode FPGA DAQ STC Bus Interface PCI MITE Generic Bus Interface PCI Bus Interface IRQ DMA AO 5 Latch 12 AO 5 12 Bit DAC AO 6 Latch 12 AO 6 12 Bit DAC AO 7 Latch 12 AO 7 12 Bit DAC DAC FIFO AO 5 Amp AO 6 Amp ...

Page 82: ...er timers for TIO a 68 pin AO I O connector Because the NI DAQCard 6715 have no DIP switches jumpers or potentiometers they are easily software configured and calibrated For the NI DAQCard 6715 connector pinouts refer to Chapter 2 I O Connector Analog Output NI DAQCard 6715 The NI DAQCard 6715 has eight channels of voltage output at the I O connector The reference for the AO circuitry is software ...

Page 83: ...4 12 Bit DAC AO 4 Amp AO 5 12 Bit DAC AO 6 12 Bit DAC AO 7 12 Bit DAC AO 5 Amp AO 6 Amp AO 7 Amp Data AO 0 12 Bit DAC AO 0 Amp AO 1 12 Bit DAC AO 2 12 Bit DAC AO 3 12 Bit DAC AO 1 Amp AO 2 Amp AO 3 Amp 0 75 A 5 V Digital Thermometer CIS EEPROM Address Control Data Control DAQ STC Analog Output Timing Control Analog Input Timing Control Digital I O Trigger Counter Timing I O RTSI Bus Interface IRQ ...

Page 84: ...els with 13 bit resolution eight lines of TTL compatible DIO two 24 bit counter timers for TIO a 68 pin extended AO I O connector Because the NI 6722 6723 have no DIP switches jumpers or potentiometers they are easily software configured and calibrated For the NI 6722 6723 connector pinouts refer to Chapter 2 I O Connector Analog Output NI 6722 6723 The NI 6722 has eight channels of voltage output...

Page 85: ...a Bus 13 Bit DAC 13 Bit DAC 13 Bit DAC 13 Bit DAC 13 Bit DAC 13 Bit DAC 13 Bit DAC EEPROM PFI Trigger Timing Digital I O 8 16 Bit ADC x4 x4 Load DAC Update Busy Clear DMA IRQ DAQ STC Analog Output Timing Control Digital I O Trigger Timing I O RTSI Bus Interface DMA IRQ Bus Interface Analog Output Analog Input Mite Interface Power On Reset FPGA Misc FIFO PCI MITE Generic Bus Interface PCI Bus Inter...

Page 86: ...of TTL compatible DIO two 24 bit counter timers for TIO a 68 pin AO I O connector Because the NI 6731 6733 have no DIP switches jumpers or potentiometers they are easily software configured and calibrated For the NI 6731 6733 connector pinouts refer to Chapter 2 I O Connector Analog Output NI 6731 6733 The NI 6731 has four channels of voltage output at the I O connector and the NI 6733 has eight c...

Page 87: ... Digital I O Trigger Counter Timing I O RTSI Bus Interface DMA IRQ Bus Interface Address Data Address Control EEPROM Control AO Control Calibration Control DMA IRQ Register Decode FPGA DAQ STC Bus Interface PCI MITE Generic Bus Interface PCI Bus Interface IRQ DMA AO 5 Latch 16 AO 5 16 Bit DAC AO 6 Latch 16 AO 6 16 Bit DAC AO 7 Latch 16 AO 7 16 Bit DAC DAC FIFO AO 5 Amp AO 6 Amp AO 7 Amp Data Data ...

Page 88: ...n generate is determined by the update clock frequency fu and the number of samples per cycle Sc The onboard 20 MHz clock that generates fu can only be divided by an integer For example suppose you want to generate a sine wave at 2 kHz with 50 samples per cycle Substitute 2 kHz and 50 samples into the previous equation to get So fu equals 100 kHz The 20 MHz clock must be divided by 200 as shown by...

Page 89: ... for the outputs of the NI 6713 is 0 V with an accuracy of 200 mV When the computer is powered on the output values might go to 100 110 mV which are within the specifications When you run LabVIEW or the test panels in MAX the driver loads the device s calibration constants into the device and the voltage drops to zero If there is any hardware connected to the device the best way to work around thi...

Page 90: ...al Instruments Application Engineers make sure every question receives an answer For information about other technical support options in your area visit ni com services or contact your local office at ni com contact Training and Certification Visit ni com training for self paced training eLearning virtual classrooms interactive CDs and Certification program information You also can register for i...

Page 91: ... ni com calibration If you searched ni com and could not find the answers you need contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual You also can visit the Worldwide Offices section of ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addr...

Page 92: ...e of or minus Ω Ohms Percent Plus or minus Positive of or plus A A Amperes the unit of electric current A D Analog to digital AC Alternating current ADC Analog to digital converter an electronic device often an integrated circuit that converts an analog voltage to a digital number AI 1 Analog input 2 Analog input channel signal AI HOLD COMP Analog input hold complete signal ...

Page 93: ...ght lines The name used for a counter physical channel is an exception because that physical channel name is not the name of the terminal where the counter measures or generates the digital signal 2 Virtual a collection of property settings that can include a name a physical channel input terminal connections the type of measurement or generation and scaling information You can define NI DAQmx vir...

Page 94: ... DAQ devices DAQ STC Data acquisition system timing controller an application specific integrated circuit ASIC for the system timing requirements of a general A D and D A system data acquisition DAQ 1 Acquiring and measuring analog or digital electrical signals from sensors transducers and test probes or fixtures 2 Generating analog or digital electrical signals dB Decibel the unit for expressing ...

Page 95: ...ommands the device accepts E EEPROM Electrically erasable programmable read only memory ROM that can be erased with an electrical signal and reprogrammed ESD Electrostatic Discharge a high voltage low current discharge of static electricity that can damage sensitive electronic components Electrostatic discharge voltage can easily range from 1 000 to 10 000 V F FPGA Field programmable gate array H ...

Page 96: ...lds and so on A module contains everything required to occupy one or more slots in a mainframe SCXI and PXI devices are modules monotonicity A characteristic of a DAC in which the analog output always increases as the values of the digital code input to it increase N NC Normally closed or not connected NI National Instruments NI DAQ Driver software included with all NI measurement devices NI DAQ i...

Page 97: ...computers electrical storms welders radio transmitters and internal sources such as semiconductors resistors and capacitors Noise corrupts signals you are trying to send or receive NRSE Nonreferenced single ended mode all measurements are made with respect to a common NRSE measurement system reference but the voltage at this reference can vary with respect to the measurement system ground P PCI Pe...

Page 98: ...d to express the rate at which a digitizer or D A converter or DAQ device samples an analog signal scan interval Controls how often a scan is initialized is regulated by the AI SAMP signal scan rate Reciprocal of the scan interval SCXI Signal Conditioning eXtensions for Instrumentation the National Instruments product line for conditioning low level signals within an external chassis near sensors ...

Page 99: ...cy An upgrade to the earlier version of NI DAQ Traditional NI DAQ Legacy has the same VIs and functions and works the same way as NI DAQ 6 9 x You can use both Traditional NI DAQ Legacy and NI DAQmx on the same computer which is not possible with NI DAQ 6 9 x transducer See sensor tsc Source clock period tsp Source pulse width TTL Transistor transistor logic a digital circuit composed of bipolar t...

Page 100: ...ents typically used with a PC that has the functionality of a classic stand alone instrument 2 A LabVIEW software module VI which consists of a front panel user interface and a block diagram program VIH Volts input high VIL Volts input low Vin Volts in VOH Volts output high VOL Volts output low Vrms Volts root mean square virtual channel See channel ...

Page 101: ...3 calibration certificate NI resources C 2 conventions ix correlated DIO DI Sample Clock 4 4 digital waveform acquisition 4 3 digital waveform generation 4 2 DO Sample Clock 4 2 counter applications 5 10 counter timing signals Counter 0 Gate 5 4 Counter 0 Internal Output 5 5 Counter 0 Source 5 3 Counter 0 Up Down 5 6 Counter 1 Gate 5 7 Counter 1 Internal Output 5 8 Counter 1 Source 5 7 Counter 1 U...

Page 102: ...gure 2 4 NI 6723 figure 2 5 NI 6731 figure 2 2 NI 6733 figure 2 3 NI DAQCard 6715 figure 2 3 signal descriptions 2 9 I O protection 4 5 instrument drivers NI resources C 1 interrupt request IRQ 9 2 interrupts 9 2 K KnowledgeBase C 1 L LabVIEW documentation xii LabWindows CVI documentation xii M Measurement Studio documentation xii minimizing glitches 3 3 N National Instruments support and services...

Page 103: ...on 3 3 related documentation x RTSI 8 1 S signal descriptions 2 9 software NI resources C 1 support technical C 1 synchronizing multiple devices 8 4 T technical support xv C 1 terminal name equivalents 2 7 timing signal routing 7 1 device and RTSI clocks 8 3 RTSI 8 1 RTSI triggers 8 1 timing signals connecting 7 3 counter 5 2 power on state 4 5 routing 7 1 waveform generation 3 6 training xiv trai...

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