National Instruments DAQ X Series, User Manual

Page: 140 / 299

Chapter 6 Digital I/O
X Series User Manual 6-18 ni.com
Routing DO Sample Clock to an Output Terminal
Yo u can ro u te DO Sample Clock (as an active low signal) o u t to any
PFI <0..15>, RTSI <0..7>, or PXIe-DSTARC terminal.
Other Timing Requirements
The DO timing engine on yo u r device internally generates DO Sample
Clock u nless yo u select some external so u rce. DO Start Trigger starts the
timing engine and either the software or hardware can stop it once a finite
generation completes. When
u sing the DO timing engine, yo u also can
specify a config u rable delay from DO Start Trigger to the first DO Sample
Clock p u lse. By defa u lt, this delay is two ticks of DO Sample Clock
Timebase. Fig u re 6-7 shows the relationship of DO Sample Clock to DO
Start Trigger.
Figure 6-7. DO Sample Clock and DO Start Trigger
DO Sample Clock Timebase Signal
The DO Sample Clock Timebase (do/SampleClockTimebase) signal is
divided down to provide a so
u rce for DO Sample Clock. Yo u can ro u te any
of the following signals to be the DO Sample Clock Timebase signal:
• 100 MHz Timebase (defa u lt)
• 20 MHz Timebase
• 100 kHz Timebase
• PXI_CLK10
• PFI <0..15>
• RTSI <0..7>
DO Sa mple Clock Time bas e
DO S t a rt Trigger
DO Sa mple Clock
Del a y
From
S t a rt
Trigger
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