
© National Instruments
|
4-13
If you are using any signal other than the onboard clock as the source of the sample clock, the
generation resumes as soon as the pause trigger is deasserted and another edge of the sample
clock is received, as shown in Figure 4-6.
Figure 4-6.
DO Pause Trigger with Other Signal Source
Using a Digital Source
To use DO Pause Trigger, specify a source and a polarity. The source can be a PFI signal or one
of several other internal signals on the cDAQ chassis.
You also can specify whether the samples are paused when DO Pause Trigger is at a logic high
or low level. Refer to the
Device Routing in MAX
topic in the
NI-DAQmx Help
or the
LabVIEW Help
for more information.
Using an Analog Source
Some C Series modules can generate a trigger based on an analog signal. In NI-DAQmx, this is
called the Analog Comparison Event, depending on the trigger properties.
When you use an analog trigger source, the samples are paused when the Analog Comparison
Event signal is at a high or low level, depending on the trigger properties. The analog trigger
circuit must be configured by a simultaneously running analog input task.
Note
Depending on the C Series module capabilities, you may need two modules
to utilize analog triggering.
Watchdog Timer
The watchdog timer is a software-configurable feature used to set critical outputs to expiration
states in the event of a software failure, a system crash, or any other loss of communication
between the application and the cDAQ chassis.
When the watchdog timer is enabled, if the cDAQ chassis does not receive a watchdog reset
software command within the time specified for the watchdog timer, the outputs go to a
user-defined expiration state and remain in that state until the watchdog timer is disarmed by a
device reset. After the watchdog timer expires, the cDAQ chassis cannot perform any operation
until the cDAQ chassis is reset.
Pause Trigger
Sample Clock