Chapter 2
Configuration and Installation
© National Instruments Corporation
2-31
AT-MIO-64F-5 User Manual
The pulse width is defined as 500 nsec minimum. The EXTSTROBE* signal can be used by an
external device to latch signals or trigger events. The EXTSTROBE* signal is an HCT signal.
EXTCONV* Signal
A/D conversions can be externally triggered with the EXTCONV* pin. Applying an active low
pulse to the EXTCONV* signal initiates an A/D conversion. Figure 2-14 shows the timing
requirements for the EXTCONV* signal.
tw 50 nsec minimum
ADC switches to hold mode within 100 nsec from this point
V
IL
VIH
tw
tw
Figure 2-14. EXTCONV* Signal Timing
The minimum allowed pulse width is 50 nsec. The ADC switches to hold mode within 100 nsec
of the high-to-low edge. This hold mode delay time is a function of temperature and does not
vary from one conversion to the next. There is no maximum pulse width limitation.
EXTCONV* should be high for at least one conversion period before going low. The
EXTCONV* signal is one HCT load and is pulled up to +5 V through a 10 k
W
resistor.
EXTCONV* is also driven by the output of Counter 3 of the Am9513A Counter/Timer. This
counter is also referred to as the sample-interval counter. The output of Counter 3 and the RTSI
connection to EXTCONV* must be disabled to a high-impedance state if A/D conversions are to
be controlled by pulses applied to the EXTCONV* pin. If Counter 3 is used to control A/D
conversions, its output signal can be monitored at the EXTCONV* pin.
A/D conversions generated by either the EXTCONV* signal or the sample-interval counter are
inhibited outside of a data acquisition sequence and when gated by either the hardware
(EXTGATE*) signal or software command register gate.
Note:
EXTCONV* and the output of Counter 3 of the Am9513A are physically connected
together on the AT-MIO-64F-5. If Counter 3 is used in an application, the EXTCONV*
signal must be left undriven. Conversely, if EXTCONV* is used in an application,
Counter 3 must be disabled.
EXTTRIG* Signal
Any data acquisition sequence can be initiated by an external trigger applied to the EXTTRIG*
pin. Applying a falling edge to the EXTTRIG* pin starts the sample and sample-interval
counters, thereby initiating a data acquisition sequence. Figure 2-15 shows the timing
requirements for the EXTTRIG* signal.
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