National Instruments AT-MIO-64F-5, User Manual

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Programming Chapter 5
AT-MIO-64F-5 User Manual 5-24 © National Instruments Corporation
0E25 Ð Selects 1 kHz clock
0F25
Ð Selects 100 Hz clock
0525 Ð Selects signal at SOURCE5 input as clock (counts the rising edge of the signal,
6 MHz maximum)
3. Write (FF08 + n ) to the Am9513A Command Register to select the Counter n Load Register.
4. Write the desired update interval to the Am9513A Data Register to store the counter n load
value.
5. Write the following value to the Am9513A Command Register to load counter n .
FF41 Ð Load Counter 1
FF42 Ð Load Counter 2
FF50 Ð Load Counter 5
6. Write (FFF0 + n ) to the Am9513A Command Register to decrement Counter n .
7. Write the following value to the Am9513A Command Register to arm Counter n .
FF21 Ð Arm Counter 1
FF22 Ð Arm Counter 2
FF30 Ð Arm Counter 5
After you complete this programming sequence, Counter n is configured to generate active-low
pulses as soon as the load/arm counter command is written.
Programming the Waveform Cycle Counter
Select the appropriate counter (1, 2, or 5) from the Am9513A Counter/Timer to be used for
counting DAC buffer cycles. To program the cycle counter, complete the following
programming sequence. All writes are 16-bit operations. All values given are hexadecimal.
1. Write FF00 + n to the Am9513A Command Register to select the Counter n Mode Register.
2. Write 0325 to the Am9513A Data Register to store the Counter n mode value. Am9513A
counter mode information can be found in Appendix E, AMD Am9513A Data Sheet .
3. Write (FF08 + n ) to the Am9513A Command Register to select the Counter n Load Register.
4. Write the desired cycle count to the Am9513A Data Register to store the Counter n load
value.
5. Write the following value to the Am9513A Command Register to load Counter n .
FF41 Ð Load Counter 1
FF42 Ð Load Counter 2
FF50 Ð Load Counter 5