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Table 6.

 NI 6589 DDC Signals and FlexRIO FPGA Module Signals (Continued)

NI 6589

FlexRIO FPGA Module

Signal Name

GPIO Input

GPIO Output

GPIO Direction

 

 

 

 

DDC CLOCK OUT LVDS+

—

GPIO_43

GPIO_7_n (as enable)

DDC CLOCK OUT LVDS-

GPIO_43_n

SE_PFI_1

GPIO_44_n

GPIO_37_n

GPIO_44 (as enable)

SE_PFI_2

GPIO_42_n

GPIO_34_n

GPIO_42 (as enable)

SE_PFI_3

GPIO_35

GPIO_33_n

GPIO_35_n (as enable)

Refer to the 

FlexRIO Help

 for more information about FlexRIO CLIP items, configuring the

NI 6589 with a socketed CLIP, and a list of available socketed CLIP signals.

Clocking

The clocks on the NI 6589 control the sample rate and other timing functions on your FlexRIO
system. The following figure shows the NI 6589 clock sources routed through the crosspoint
switch. The Generation Bank I/O clock, PFI Bank I/O clock, and Global clock are all sourced
by the crosspoint switch. The Acquisition Bank I/O clock can be sourced from the crosspoint
switch or accessed directly through the Strobe Bypass path.

Note

 

Only the Acq_IO_Clock_Source signal can use the STROBE Bypass path. If

Acq_IO_Clock_Source is set to Strobe Bypass, then Gen_IO_Clock_Source,
PFI_IO_Clock_Source, and IO_Module_Clock_1_Source cannot be set to Strobe
From Crosspoint Switch.

18

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NI 6589 Getting Started Guide

Summary of Contents for 6589

Page 1: ...onment 4 Installing the NI 6589 5 Confirming that Measurement Automation Explorer MAX Recognizes the Device 5 Cables 5 Accessories 6 Front Panel and Connector Pinouts 8 Block Diagrams 10 Component Level Intellectual Property CLIP 12 NI 6589 CLIP 13 Clocking 18 Where to Go Next 20 Worldwide Support and Services 20 Electromagnetic Compatibility Guidelines This product was tested and complies with th...

Page 2: ... slots FlexRIO Documentation Table 1 FlexRIO Documentation Locations and Descriptions Document Location Description Getting started guide for your FlexRIO FPGA module or Controller for FlexRIO Available from the Start menu and at ni com manuals Contains installation instructions for your FlexRIO system Specifications document for your FlexRIO FPGA module or Controller for FlexRIO Available from th...

Page 3: ...and I O programming instructions and adapter module component level IP CLIP FlexRIO Adapter Module Development Kit User Manual Available from the Start menu at Start All Programs National Instruments NI FlexRIO NI FlexRIO Adapter Module Development Kit Documentation Contains information about how to create custom adapter modules for use with FlexRIO FPGA modules LabVIEW Examples Available in NI Ex...

Page 4: ...r any other sign of damage Caution Never touch the exposed pins of connectors Note Do not install a device if it appears damaged in any way 3 Unpack any other items and documentation from the kit Store the devices in the antistatic package when they are not in use Preparing the Environment Ensure that the environment you are using the NI 6589 in meets the following specifications Operating tempera...

Page 5: ...vice is correctly installed and restart 4 Controllers for FlexRIO only Your device appears under the Remote Devices section Cables Caution You must operate the NI 6589 with shielded cables and shielded accessories to ensure compliance with the EMC requirements defined in the NI 6589 Specifications Do not use unshielded cables or accessories unless they are installed in a shielded enclosure with pr...

Page 6: ... NI SMA 2164 refer to the NI SMA 2164 2165 Test Fixture User Guide Figure 1 Connecting the NI SMA 2164 Accessory 1 2 NI PXI 1042 3 STROBE CLK_LVPECL IO_3 IO_7 IO_10 I IO_6 IO_11 IO_13 MADE IN U S A IO_15 ASSY19 2 5 3 3 A 0 1 I O_ 12 IO_4 IO_5 IO_8 IO_2 IO_9 IO_1 PFI_3 CLK_LVDS PFI_2 PFI_1 VOS VOS VOS VOS VOS VOS VOS VOS VOS VOS VOS IO_0 VOS VOS S N VOS VOS VOS VOS VOS VOS VOS VOS 6 1 7 0 4 0 4 9 1...

Page 7: ...Connector application note Visit ni com info and enter the Info Code rdinwa to download this note If you are designing a custom accessory to use with a device that uses an InfiniBand connector you can also purchase this connector from NI Note If you design a custom cabling solution with the DDC connector 779157 01 and SHB12X B12X shielded cable 192344 01 the NI 6589 pinout is reversed at the end c...

Page 8: ...O 8 GND DIO 9 GND DIO 10 GND DIO 11 GND DIO 12 GND DIO 13 GND DIO 14 GND DIO 15 GND GND GND GND GND PFI 1 PFI 2 PFI 3 DIO 0 DIO 1 DIO 2 DIO 3 DIO 4 DIO 5 DIO 6 DIO 7 DIO 8 DIO 9 DIO 10 DIO 11 DIO 12 DIO 13 DIO 14 DIO 15 1 3 2 4 6 5 7 9 8 10 12 11 13 15 14 16 18 17 19 21 20 22 24 23 25 27 26 28 30 29 31 33 32 34 36 35 37 39 38 40 42 41 43 45 44 46 48 47 49 51 50 52 54 53 55 57 56 58 60 59 61 63 62 ...

Page 9: ...r Signal Type Signal Description PFI 0 PFI 0 Control Bidirectional single ended terminal for channel PFI 0 CLOCK IN CLOCK IN Clock External single ended clock input terminal The following table contains DDC pin location information for the NI 6589 The signal names listed in this table refer to the signals shown in the front panel pinout Table 3 NI 6589 DDC Connector Names and Descriptions Signal N...

Page 10: ...l PFI channels 1 through 4 SE_PFI 1 3 68 71 72 Control Single ended terminals for bidirectional PFI channels 1 through 3 GND 1 4 7 10 13 16 19 22 25 28 31 34 37 40 42 46 49 52 55 58 69 Ground Ground reference for signals For more detailed information about the NI 6589 front panel connectors refer to the NI 6589 Specifications Block Diagrams The following figures show the data flow through the NI 6...

Page 11: ...gure 6 Single Ended PFI Lines Data from NI FlexRIO FPGA Module GPIO Output Output Enable from NI FlexRIO FPGA Module GPIO Direction Data to NI FlexRIO FPGA Module GPIO Input SE_PFI 1 3 and PFI 0 50 Ω Figure 7 Clock Output Signals Clock from NI FlexRIO FPGA Module GPIO Output Output Enable from NI FlexRIO FPGA Module GPIO Direction DDC CLK OUT LVDS LVDS DDC CLK OUT Switch 110 Ω 10 kΩ 10 kΩ NI 6589 ...

Page 12: ...support two types of CLIP user defined and socketed Component Level Intellectual Property CLIP The LabVIEW FPGA Module includes component level intellectual property CLIP for HDL IP integration FlexRIO devices support two types of CLIP user defined and socketed User defined CLIP allows you to insert HDL IP into an FPGA target enabling VHDL code to communicate directly with an FPGA VI Socketed CLIP...

Page 13: ... following table for the available NI 6589 CLIP items and each CLIP item s function and available signals Note All NI 6589 CLIP items allow individual clock output inversion NI 6589 Getting Started Guide National Instruments 13 ...

Page 14: ...olean control NI 6589 Serdes Channel CLIP Sixteen bidirectional data LVDS lines Four LVDS PFI lines One LVDS STROBE line One LVDS clock output signal Four single ended PFI lines One single ended clock input signal Provides read write access to all LVDS and single ended channels using a channel based interface You can access the LVDS data and PFI channels using a U16 data type in which the top six ...

Page 15: ...SERDES block that serializes or deserializes respectively the signal by a factor of six by default Therefore with every regional clock cycle the NI 6589 reads or writes six samples to or from the ISERDES or OSERDES blocks All OSERDES and ISERDES blocks are set to double data rate DDR mode The following table lists the NI 6589 SMA connector signals and corresponding FlexRIO FPGA module signals nece...

Page 16: ..._47 GPIO_48 GPIO_15_n PFI 4 GPIO_47_n GPIO_48_n DIO 0 GPIO_62 GPIO_32 GPIO_4_n DIO 0 GPIO_62_n GPIO_32_n DIO 1 GPIO_63 GPIO_28 GPIO_11 DIO 1 GPIO_63_n GPIO_28_n DIO 2 GPIO_64 GPIO_23 GPIO_9_n DIO 2 GPIO_64_n GPIO_23_n DIO 3 GPIO_65 GPIO_19 GPIO_3 DIO 3 GPIO_65_n GPIO_19_n DIO 4 GPIO_60 GPIO_31 GPIO_4 DIO 4 GPIO_60_n GPIO_31_n DIO 5 GPIO_61 GPIO_27 GPIO_5 DIO 5 GPIO_61_n GPIO_27_n DIO 6 GPIO_55 GPI...

Page 17: ...O_51_n GPIO_21_n DIO 11 GPIO_50 GPIO_17 GPIO_2 DIO 11 GPIO_50_n GPIO_17_n DIO 12 GPIO_49_CC GPIO_29 GPIO_12 DIO 12 GPIO_49_n_CC GPIO_29_n DIO 13 GPIO_57_CC GPIO_24 GPIO_13 DIO 13 GPIO_57_n_CC GPIO_24_n DIO 14 GPIO_58_CC GPIO_20 GPIO_3_n DIO 14 GPIO_58_n_CC GPIO_20_n DIO 15 GPIO_59_CC GPIO_16 GPIO_1_n DIO 15 GPIO_59_n_CC GPIO_16_n STROBE GPIO_56_CC GPIO_8_n GPIO_26_CC GPIO_38_CC GPIO_LVDS STROBE GP...

Page 18: ... signals Clocking The clocks on the NI 6589 control the sample rate and other timing functions on your FlexRIO system The following figure shows the NI 6589 clock sources routed through the crosspoint switch The Generation Bank I O clock PFI Bank I O clock and Global clock are all sourced by the crosspoint switch The Acquisition Bank I O clock can be sourced from the crosspoint switch or accessed ...

Page 19: ...the values of the crosspoint switch clock options Table 7 Clock Values Value Clock Option 0 Tristate Output disabled high impedance 2 Sync Clock PXI Express Only Clock from PXI Express backplane You can select PXI_CLK10 or DStarA in the Details category of the IO Module Properties dialog box 3 Adapter Module Onboard Clock Clock generated from the Si570 clock chip 4 Strobe From Crosspoint Switch LV...

Page 20: ...i com Available from the Start menu Worldwide Support and Services The NI website is your complete resource for technical support At ni com support you have access to everything from troubleshooting and application development self help resources to email and phone assistance from NI Application Engineers Visit ni com services for NI Factory Installation Services repairs extended warranty and othe...

Page 21: ...78759 3504 NI also has offices located around the world For telephone support in the United States create your service request at ni com support or dial 1 866 ASK MYNI 275 6964 For telephone support outside the United States visit the Worldwide Offices section of ni com niglobal to access the branch office websites which provide up to date contact information support phone numbers email addresses ...

Page 22: ...d party legal notices in the readme file for your NI product Refer to the Export Compliance Information at ni com legal export compliance for the NI global trade compliance policy and how to obtain relevant HTS codes ECCNs and other import export data NI MAKES NO EXPRESS OR IMPLIED WARRANTIES AS TO THE ACCURACY OF THE INFORMATION CONTAINED HEREIN AND SHALL NOT BE LIABLE FOR ANY ERRORS U S Governme...

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