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National Instruments 5761R, User Manual And Specifications

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375509A-01

May10

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Summary of Contents for 5761R

Page 1: ...ts Front Panel and Connector Pinouts 2 Block Diagram 4 NI 5761 Component Level Intellectual Property CLIP 5 Cables 6 Clocking 7 Using Your NI 5761R with a LabVIEW FPGA Example VI 7 Creating a LabVIEW Project and Run a VI on an FPGA Target 9 How to Use Your NI FlexRIO Documentation Set 12 Specifications 13 Where to Go for Support 24 Note Before configuring your NI 5761R you must install the appropr...

Page 2: ... before powering down the module and only connect signals after the adapter module has been powered on by the NI FlexRIO FPGA module Table 1 NI 5761 Front Panel Connectors Device Front Panel Connector Signal Description AUX I O Refer to Table 2 for the signal names and descriptions D 0 3 LEDs for custom configuration CLK IN Provides the NI 5761 with an external Sample clock or Reference clock TRIG...

Page 3: ...ssis NI is not liable for any damage resulting from such signal connections For the maximum input and output ratings for each signal refer to the Specifications section of this document Table 2 NI 5761 AUX I O Connector Pin Assignments Micro D Connector Pin Signal Signal Description 1 AUXIO0 General purpose digital input or output channels 2 AUXIO1 3 AUXIO2 4 AUXIO3 5 AUXIO4 6 AUXIO5 7 AUXIO6 8 AU...

Page 4: ...Initialization Done Reinitialize Configuration Error Sample Clock Select Sample Clock Commit SPI Idle Analog FE IO Module Clock 0 n 1 Single Sample CLIP n 2 Multiple Sample CLIP Multiple Sample CLIP Single Sample CLIP AI 0 AI 1 AI 2 AI 3 AI 0 Data N AI 1 Data N AI 2 Data N AI 3 Data N AI 0 Data N 1 AI 1 Data N 1 AI 2 Data N 1 AI 3 Data N 1 Data Clock Data Sample Clock Clock Buffer Internal Referen...

Page 5: ... IP integration functionality of the user defined CLIP but also allows the CLIP to communicate directly with circuitry external to the FPGA Adapter module socketed CLIP allows your IP to communicate directly with both the FPGA VI and the external adapter module connector interface Figure 3 shows the relationship between an FPGA VI and CLIP Figure 3 CLIP Relationship Adapter Module CLIP Socket LabV...

Page 6: ...e CLIP Generates one sample per clock cycle at a default sample rate of 250 MHz You can set a lower sample rate by using an external Sample clock This CLIP provides access to four analog input channels eight PFI lines and an input clock selector that can be configured to use one of the following settings Internal Sample clock Internal Sample clock locked to an external Reference clock through the ...

Page 7: ...VI Note In NI application software NI FlexRIO adapter modules are referred to as IO Modules Complete the following steps to run an example that acquires a waveform on CH 0 of the NI 5761 1 Connect one end of an SMA cable to CH 0 on the front panel of the NI 5761 and the other end of the cable to your device under test DUT 2 Launch LabVIEW 3 In the Getting Started window click Find Examples to disp...

Page 8: ... Channel box 9 Set the Trigger Level V and the Record Size controls to the desired value 10 In the Trigger Type box you can select either Software Trigger or Data Edge If you select Software Trigger the VI acquires data every time you click the Software Trigger button on the front panel of the VI If you select Data Edge the VI acquires data every time an edge occurs 11 Click the Run button to run ...

Page 9: ...125 MHz in the Compile for single frequency control Click OK 8 Right click the FPGA target and select New FPGA Base Clock again 9 In the Resource pull down menu select 200 MHz Clock Click OK 10 Right click IO Module and select Properties In the General category you can see the available CLIP for the NI 5761 in the Component Level IP pane If the category information is dimmed select the Enable IO M...

Page 10: ... right click My Computer and select New VI A blank VI opens Select Window Show Block Diagram to open the VI block diagram 2 Add the Open FPGA VI Reference function located on the FPGA Interface palette to the block diagram 3 Right click the Open FPGA VI Reference function labeled No Target and select Configure Open FPGA VI Reference 4 In the Configure Open FPGA VI Reference dialog box select the V...

Page 11: ...I Reference function located on the FPGA Interface palette to the right of the While Loop on the block diagram 17 Wire the FPGA VI Reference Out indicator of the Read Write Control function to the FPGA VI Reference In control of the Close FPGA VI Reference function 18 Wire the error out indicator of the Read Write Control function to the error in control of the Close FPGA VI Reference function You...

Page 12: ...Help Embedded in LabVIEW Help Contains information about the basic functionality of LabVIEW FPGA Module NI FlexRIO Help Embedded in LabVIEW FPGA Module Help Contains FPGA module adapter module and CLIP configuration information LabVIEW Examples Available in LabVIEW Example Finder Contains examples of how to run FPGA VIs and Host VIs on your device Other Useful Information on ni com ni com ipnet Co...

Page 13: ...otherwise noted All graphs illustrate the performance of a representative module Typical values describe useful product performance that are not covered by warranty Typical values cover the expected performance of units over ambient temperature ranges of 23 5 C with a 90 confidence level based on measurements taken during development or production Analog Input AI CH 0 through AI CH 3 General Chara...

Page 14: ... dB 100 1 MHz 90 dB 501 MHz 80 dB AC Coupled Measurements Figure 8 AC Coupled Bandwidth Passband Table 5 AC Coupled Spectral Performance Measurement 20 17 MHz 70 17 MHz 123 17 MHz SNR 72 5 dB 71 4 dB 70 5 dB SINAD 72 3 dB 71 2 dB 70 3 dB SFDR 88 dB 84 dB 80 dB These measurements were extrapolated from a 4 dBFS plot 1M 80k 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 2 3 4 5 Gain dB Frequency Hz 100k 10...

Page 15: ...MS Average Figure 10 AC Coupled Spectral Measurements 20 1 MHz 1 dBFS 8 192 Point FFT 10 RMS Average 20 0 115 110 105 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 Amplitude dBFS Frequency MHz 40 60 80 100 120 10 0 115 110 105 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 0 Amplitude dBFS Frequency MHz 15 10 5 20 30 40 50 60 70 90 100 110 120 80 ...

Page 16: ...C to 250 MHz Table 6 lists the DC coupled spectral performance measurements All values are measured with a 250 MHz external Sample clock Channel to channel isolation 1 MHz 90 dB 100 1 MHz 80 dB 501 MHz 70 dB Table 6 DC Coupled Spectral Performance Measurement 20 1 MHz 70 1 MHz 122 1 MHz SNR 65 7 dB 64 3 dB 63 dB SINAD 65 2 dB 61 8 dB 56 6 dB SFDR 76 dB 65 dB 58 dB 0 115 110 105 100 95 90 85 80 75 ...

Page 17: ... Ω you can add series resistance close to the source to properly bias the NI 5761 input terminals You can also use the NI 5761 input channel bias DACs to remove DC offset present in the system For more information about programming the bias DACs refer to the NI 5761 CLIP topics in the NI FlexRIO Help DC Coupled Measurements Figure 12 DC Coupled Bandwidth Passband 10 0 15 14 13 12 11 10 9 8 7 6 5 4...

Page 18: ...Figure 14 DC Coupled Spectral Measurements 20 1 MHz 1 dBFS 8 192 Point FFT 10 RMS Average 0 115 110 105 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 0 Amplitude dBFS Frequency MHz 15 10 5 25 50 75 100 125 0 115 110 105 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 0 Amplitude dBFS Frequency MHz 15 10 5 10 20 30 40 50 60 70 80 90 100 110 120 ...

Page 19: ...nt FFT 10 RMS Average Analog Input Phase Noise Figure 16 Analog Input Phase Noise 0 115 110 105 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 0 Amplitude dBFS Frequency MHz 15 10 5 20 40 60 80 100 120 1k 0 160 0 150 0 140 0 130 0 120 0 Phase Noise dBc Hz Frequency Offset from 10 MHz Carrier Hz 110 0 100 0 90 0 80 0 70 0 10k 100k 500k ...

Page 20: ... Characteristics Number of channels 1 single ended Connector SMA Input impedance 50 Ω Input coupling AC External Sample Clock Input voltage range 0 63 Vpk pk to 2 5 Vpk pk Input frequency range 175 MHz to 250 MHz Absolute maximum input 10 V DC 3 1 Vpk pk AC External Reference Clock Input voltage range 1 4 Vpk pk to 4 4 Vpk pk Input frequency range 10 MHz Absolute maximum input 10 V DC 5 Vpk pk AC ...

Page 21: ...Zout 50 Ω Iout 2 mA Maximum toggle frequency 500 kHz Absolute maximum input 0 5 V to 7 V EEPROM Map Caution Only write to User Space Writing to any other offset may cause the NI 5761 to stop functioning Voltage Level Minimum Maximum VIL 0 V 0 7 V VIH 1 7 V 5 5 V Voltage Level Minimum Maximum VIL 0 V 0 7 V VIH 1 7 V 5 5 V VOL 0 V 0 4 V VOH 1 9 V 2 5 V Byte Address Size Bytes Field Name 0x0 2 Vendor...

Page 22: ...e with IEC 60068 2 1 and IEC 60068 2 2 Relative humidity range 5 to 95 noncondensing tested in accordance with IEC 60068 2 56 Note Clean the device with a soft non metallic brush Make sure that the device is completely dry and free from contaminants before returning it to service Safety This product meets the requirements of the following standards of safety for electrical equipment for measuremen...

Page 23: ...ber or product line and click the appropriate link in the Certification column Environmental Management National Instruments is committed to designing and manufacturing products in an environmentally responsible manner NI recognizes that eliminating certain hazardous substances from our products is beneficial not only to the environment but also to NI customers For additional environmental informa...

Page 24: ...orth Mopac Expressway Austin Texas 78759 3504 National Instruments also has offices located around the world to help address your support needs For telephone support in the United States create your service request at ni com support and follow the calling instructions or dial 512 795 8248 For telephone support outside the United States contact your local branch office Australia 1800 300 800 Austri...

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