NAD C541, Service Manual

Page: 15 / 32

64
VCC1
63
LDS
62
LDD
61
BH1
60
PH1
59
LF2
58
VR
57
REFI
56
VCC2
55
FSS
54
DRF
53
CE
52
DAT
51
CL
50
CLK
49
DEF
48 NC
47 TBC
46 FSC
45 DGND
44 SLI
43 SLC
42 RFS–
41 RFSM
40 CV+
39 CV–
38 SLOF
37 HFL
36 TES
35 TOFF
34 TGL
33 JP+
32
JP–
31
SL+
30
SL–
29
SLD
28
SLEQ
27
SPD
26
SP–
25
SPG
24
SPI
23
SP
22
AGND
21
FE–
20
FE
19
FA–
18
FA
17
FD–
1 FIN2
2 FIN1
3 E
4 F
5 TB
6 TE–
7 TE
8 TESI
9 SCI
10 TH
11 TA
12 TD–
13 TD
14 JP
15 TO
16 FD
REF
BAL
I/V
TE
T.SERVO & T.LOGIC
F.SERVO & F.LOGIC SPINDLE SERVO
SLC
APC
RF DET
VCA
RF Amp
µ
- com
INTER FACE
VCA
SLED SERVO
17
IC BLOCK DIAGRAM
U101: LA9240
EFMO
DEFI
EFMIN
LRSY
C2F
ROMXA
DOUT
ASDACK
ASDFIN
ASDFIR
ASLRCK
DACKO
DFOLO
DFORO
LRCKO
FSEQ
CLV+
CLV–
V/P
PW,SBCK
SBSY,SFSY
WRQ,SQOUT
CQCK
COIN
RWC
DEMO
FST,FOCS
FZD
HFL,RES TES,JP+
TOFF,JP– THLD,TGL
EMPH
LASER
16M
4.2M
CS
CONT
EFLG
FSX
XIN
XOUT
XVDD,XVSS
CK2
RVDD,RVSS
MUTER
RCHP RCHN
LVDD,LVSS
LCHN
LCHP
TGL
EFMO VVDD VVSS PDO ISET PCK TAI TST11 TST10 TSET1 TEST2 TEST3 TEST4 TEST5 VDD VSS
2K x 8-bit RAM
RAM address
generator
Interpolation
and muting
Antishock
interface
Digital
attenuator
8x oversampling
digital filters
Level meter
Peak meter
Crystal oscillator system
Timing generation
C1 AND C2 ERROR DETECTION
AND CORRECTION
FLAG PROCESSING
CLV DIGITAL
SERVO
SUBCODE
SEPARATION
Q CRC
MICROPROCESSOR
INTERFACE
Slice level
control
VCO clock Oscillator
Clock control
SYNCHRONIZATION
DETECTION
EFM DEMODULATION
SERVO
COMMAND
Digital
output
1bit DAC
10
9 6 3 5
21
2
69 37 80 12 26 31 74 27
42
45
8 4
44
56
38
39
40
41
36
34
33
46 48 49 52 53 55 43 77 62 58 73 75 70
32
23,29 20,28
68,19
16,17
18
30
64
66
67
63,65
57,60
59,61
15
14
13
22
11
1
24,25
72 71 78
76,79 51,54 47,50
35
U301: LC78621ED