Motorola PPC/PMC-8260/DS1, Reference Manual, Page: 108 / 150

Memory Map Memory Map and Devices
5 - 4 PPC/PMC-8260/DS1
Memory Map
The following table shows how important devices are mapped on the PPC/PMC-
8260/DS1 by the firmware.
Table 22: Memory Map
Device Address Range Port
Size
Chip-
select Comment
SDRAM
(64 MByte)
00000000
16
- 03FFFFFF
16
64 1 Mapped to Boot Flash if
PowerQUICC II is in
reset for reprogramming
SSRAM 18000000
16
- 180FFFFF
16
(1 MByte)
32 2 - 5 Local bus
PowerSPAN II
Register 30000000
16
- 30001000
16
32 n.a. Decoded by PowerSPAN
II (4 KByte space
PB_REG_BADDR is one
of four speciality proces-
sor bus slave images)
PowerQUICC II F0000000
16
- F001FFFF
16
32 n.a. 128 KByte register and
internal RAM
(Internal Memory Map
register (IMMR) power-
up option Internal Space
Base (ISB))
Framer #1 F0040000
16
- F00401FF
16
8 6
Framer #2 F0040200
16
- F00403FF
16
8 6
Framer #3 F0040400
16
- F00405FF
16
8 6
Framer #4 F0040600
16
- F00407FF
16
8 6
Agere T8105 F0080000
16
- F0087FFF
16
8 7
LED_CTRL reg-
ister F00A0000
16
- F00A7FFF
16
8 8
Boot Flash FE000000
16
- FE1FFFFF
16
(2 MByte)
8 0 Reset value: 00000000
16