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MVME5500

Single-Board Computer

Installation and Use

V5500A/IH3

July 2005 Edition

Summary of Contents for MVME5500

Page 1: ...MVME5500 Single Board Computer Installation and Use V5500A IH3 July 2005 Edition ...

Page 2: ...inted in the United States of America Motorola and the stylized M logo are trademarks of Motorola Inc registered in the U S Patent and Trademark Office All other product or service names mentioned in this document are the property of their respective owners ...

Page 3: ...the Equipment Operating personnel must not remove equipment covers Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment Service personnel should not replace components with power cable connected Under certain conditions dangerous voltages may exist even with the power ...

Page 4: ...losion if battery is replaced incorrectly Replace battery only with the same or equivalent type recommended by the equipment manufacturer Dispose of used batteries according to the manufacturer s instructions Attention Caution Il y a danger d explosion s il y a remplacement incorrect de la batterie Remplacer uniquement avec une batterie du même type ou d un type équivalent recommandé par le constr...

Page 5: ...2 Limits and Methods of Measurement of Radio Interference Characteristics of Information Technology Equipment this product tested to Equipment Class A EN55024 Information technology equipment Immunity characteristics Limits and methods of measurement Board products are tested in a representative system to show compliance with the above mentioned requirements A proper installation in a CE marked sy...

Page 6: ...sible that this publication may contain reference to or information about Motorola products machines and programs programming or services that are not available in your country Such references or information must not be construed to mean that Motorola intends to announce such Motorola products programming or services in your country Limited and Restricted Rights Legend If the documentation contain...

Page 7: ...net 1 8 PMC SBC Mode Selection 1 8 P2 I O Selection 1 9 Flash Boot Bank Select Header J8 1 11 Flash 0 Programming Enable Header J9 1 11 Safe Start ENV Header J10 1 12 Flash 0 Block Write Protect Header J15 1 12 SROM Initialization Enable Header J17 1 13 PowerPC Bus Mode Select Header J19 1 13 CPU COP Enable Header J20 1 14 PCI Bus 0 0 Speed Header J25 1 14 VME SCON Select Header J27 1 15 PCI Bus 1...

Page 8: ...ommand Line Help 3 5 Command Line Rules 3 6 MOTLoad Command List 3 7 VME Settings 3 12 CR CSR Settings 3 16 Displaying VME Settings 3 16 Editing VME Settings 3 17 Deleting VME Settings 3 18 Restoring Default VME Settings 3 18 Remote Start 3 19 CHAPTER 4 Functional Description Features 4 1 Block Diagram 4 2 Processor 4 3 L3 Cache 4 3 System Controller 4 4 CPU Bus Interface 4 4 Memory Controller Int...

Page 9: ... 5 2 Ethernet Connectors J2 5 3 IPMC Connector J3 5 3 PCI PMC Expansion Connector J4 5 5 CPU COP Connector J5 5 8 PMC 1 Interface Connectors J11 J12 J13 J14 5 8 Boundary Scan Connector J18 5 15 PMC 2 Interface Connectors J21 J22 J23 J24 5 16 Asynchronous Serial Port COM2 Planar Connector J33 5 22 VMEbus Connectors P1 P2 PMC Mode 5 22 VMEbus Connectors P1 P2 SBC Mode 5 25 Memory Expansion Connector...

Page 10: ...rements A 1 Environmental Specifications A 2 APPENDIX B RAM5500 Memory Expansion Module Overview B 1 Features B 1 Functional Description B 1 RAM5500 Description B 1 SROM B 3 Clocks B 3 RAM5500 Module Installation B 3 Memory Expansion Connector P1 Pin Assignments B 5 RAM5500 Programming Issues B 8 Serial Presence Detect SPD Data B 8 APPENDIX C Thermal Validation Thermally Significant Components C 1...

Page 11: ...xi APPENDIX D Related Documentation Motorola Embedded Communications Computing Documents D 1 Manufacturers Documents D 2 Related Specifications D 5 ...

Page 12: ......

Page 13: ...IPMC712 Mode 5 37 Figure 5 2 SBC IPMC761 Mode 5 38 Figure 5 3 PMC Mode 5 39 Figure B 1 RAM5500 Block Diagram B 2 Figure C 1 Thermally Significant Components Primary Side C 3 Figure C 2 Thermally Significant Components Secondary Side C 4 Figure C 3 Mounting a Thermocouple Under a Heatsink C 7 Figure C 4 Measuring Local Air Temperature C 8 List of Figures ...

Page 14: ......

Page 15: ...Assignments 5 17 Table 5 13 PMC 2 Connector J23 Pin Assignments 5 19 Table 5 14 PMC 2 Connector J24 Pin Assignments 5 20 Table 5 15 COM2 Planar Connector J33 Pin Assignments 5 22 Table 5 16 VME Connector P2 Pin Assignments PMC Mode 5 23 Table 5 17 VME Connector P2 Pinout with IPMC712 5 26 Table 5 18 VME Connector P2 Pinouts with IPMC761 5 27 Table 5 19 Memory Expansion Connector P4 Pin Assignments...

Page 16: ...5 33 PCI Bus 1 0 Speed Header J25 Pin Assignments 5 44 Table 5 34 EEPROM Write Protect Header J30 Pin Assignments 5 45 Table A 1 Power Requirements A 1 Table A 2 MVME5500 Specifications A 2 Table B 1 RAM5500 Feature Summary B 1 Table B 2 RAM5500 Connector P1 Pin Assignments B 5 Table C 1 Thermally Significant Components C 2 Table D 1 Motorola ECC Documents D 1 Table D 2 Manufacturers Documents D 2...

Page 17: ...SDRAM Scanbe handles MVME5500 0163 1 GHz MPC7455 processor 512MB SDRAM IEEE handles Date Changes July 2005 Updated the description of the J17 header to indicate the factory default has the SROM initialization disabled with a jumper across pins 2 3 October 2003 Added diagrams to Ethernet 2 PMC SBC Mode and P2 I O Selection Headers J6 J7 J28 J32 J34 J97 J110 on page 5 33 to better explain the PMC SB...

Page 18: ...lock diagram level Chapter 5 Pin Assignments provides pin assignments for various headers and connectors on the MMVE5500 single board computer Appendix A Specifications provides power requirements and environmental specifications Appendix B RAM5500 Memory Expansion Module provides a description of the RAM5500 memory expansion module as well as installation instructions and connector pin assignment...

Page 19: ...how you used it Then tell us your feelings about its strengths and weaknesses and any recommendations for improvements Conventions Used in This Manual The following typographical conventions are used in this document bold is used for user input that you type just as it appears it is also used for commands options and arguments to commands and names of programs directories and files italic is used ...

Page 20: ...xx Enter Return or CR represents the carriage return or Enter key Ctrl represents the Control key Execute control characters by pressing the Ctrl key and the letter simultaneously for example Ctrl d ...

Page 21: ... system via its P1 and P2 connectors and contains two IEEE 1386 1 PCI mezzanine card PMC slots The PMC slots are 64 bit and support both front and rear I O Additionally the MVME5500 is user configurable by setting on board jumpers Two I O modes are possible PMC mode or SBC mode also called 761 or IPMC mode The SBC mode uses the IPMC712 I O PMC and the MVME712M transition module or the IPMC761 I O ...

Page 22: ...ent from the shipping carton Refer to the packing list and verify that all items are present Save the packing material for storing and reshipping of equipment Note If the shipping carton is damaged upon receipt request that the carrier s agent be present during the unpacking and inspection of the equipment Table 1 1 Startup Overview What you need to do Refer to Unpack the hardware Unpacking Guidel...

Page 23: ...component over any surface If an ESD station is not available you can avoid damage resulting from ESD by wearing an antistatic wrist strap available at electronics stores that is attached to an active electrical ground Note that a system chassis may not be grounded if it is unplugged Caution Caution Inserting or removing modules with power applied may result in damage to module components Warning ...

Page 24: ...onfigurable These jumper settings are described further on in this section If you are resetting the board jumpers from their default settings it is important to verify that all settings are reset properly MVME5500 Preparation Figure 1 1 illustrates the placement of the jumpers headers connectors and various other components on the MVME5500 There are several manually configurable headers on the MVM...

Page 25: ...m Flash 1 J9 Flash 0 Programming Enable Header No jumper installed 1 2 Disables Flash 0 writes Enables Flash 0 writes J10 Safe Start ENV Header No jumper installed 1 2 2 3 Normal ENV settings used during boot Normal ENV settings used during boot Safe ENV settings used during boot J15 Flash 0 Block Write Protect Header No jumper installed 1 2 Disables Flash 0 K3 block writes Enables Flash 0 K3 bloc...

Page 26: ... 2 3 on both 2 3 on J32 1 2 on J28 PMC mode SBC IPMC761 mode SBC IPMC712 mode J29 PCI Bus 1 0 Speed Header No jumper installed 1 2 PMC board controls whether the bus runs at 33 MHz or 66 MHz Forces PCI bus 1 0 to remain at 33 MHz J30 EEPROM Write Protect Header No jumper installed 1 2 Disables EEPROM programming Enables EEPROM programming J34 J97 J98 J99 Ethernet 2 Selection Headers see also J6 J1...

Page 27: ...ing section Figure 1 1 MVME5500 Layout J34 4202 0703 COM1 ABT RST 10 100 CPU BFL ENET 2 ENET 1 J5 J18 J20 J27 J30 J10 J17 J9 J15 J16 J19 J25 J29 J28 U22 J8 J3 J1 J2 P4 J13 J14 J11 J12 J23 J24 J21 J22 P1 P2 XU2 XU1 U25 U16 U19 GigE PMC 1 PMC 2 J6 J100 J98 J99 J97 J33 J32 J4 U8 U10 U11 U12 U20 U9 U17 U15 U129 U23 U27 U2 U3 U13 U14 U4 U5 U6 U7 U26 U1 U18 U28 U29 U30 J101 J7 U31 U24 U124 U123 J102 J11...

Page 28: ...nect to PMC 1 user I O connector J14 If a PMC card is plugged into PMC slot 1 there may be a conflict between the I O from the PMC card and the rear Ethernet signals This conflict does not occur with the IPMC761 or IPMC712 modules For J34 J97 J98 and J99 no jumpers are installed for front panel Ethernet For rear P2 Ethernet install jumpers across pins 1 2 on all four headers when in SBC IPMC761 mo...

Page 29: ...in A30 If there is an incompatible board plugged into this P2 slot damage may occur When J32 is configured for SBC IPMC mode 12V is supplied to P2 pin C7 If there is an incompatible board plugged into this P2 slot damage may occur P2 I O Selection Nine 3 pin planar headers J102 J110 are for P2 I O selection Install jumpers across pins 1 2 on all nine headers when in PMC mode Install jumpers across...

Page 30: ...00 J100 J101 J101 1 2 3 2 1 J34 3 2 1 3 2 1 1 2 3 3 2 1 1 2 3 1 2 3 3 2 1 2 1 J97 2 1 J98 J99 2 1 J34 2 1 J97 2 1 J98 2 1 J99 2 1 J28 J32 J28 J32 3 2 1 3 2 1 3 2 1 3 2 1 PMC Mode SBC IPMC712 Mode factory configuration J28 J32 3 2 1 3 2 1 SBC IPMC761 Mode J102 3 2 1 P2 PMC 2 I O J110 J102 3 2 1 P2 IPMC I O J110 factory configuration extended SCSI ...

Page 31: ...ing Enable Header J9 A 2 pin planar header enables disables programming of Flash 0 as a means of protecting the contents from being corrupted No jumper installed disables all Flash 0 programming The jumper must be installed in order to erase array blocks programming data or configuring lock bits J8 1 2 3 1 2 3 Boots from Flash device 0 J8 J8 1 2 3 factory configuration Boots from Flash device 0 Bo...

Page 32: ...family write protect feature No jumper installed enables the lock down mechanism Blocks locked down cannot be unlocked with the unlock command The jumper must be installed in order to override the lock down function and enable blocks to be erased or programmed through software Refer to the Intel K3 Flash data sheet listed in Appendix D Related Documentation for further details J10 1 2 3 1 2 3 Norm...

Page 33: ...jumper across pins 2 3 disables this initialization sequence PowerPC Bus Mode Select Header J19 A 3 pin planar header selects the processor bus operating mode No jumper or a jumper across pins 1 2 selects the 60x bus mode while a jumper across pins 2 3 selects the MPX bus mode J17 1 2 3 1 2 3 Enable SROM initialization J17 J17 1 2 3 Enable SROM initialization Disable SROM initialization factory co...

Page 34: ...header that can force PCI bus 0 0 to run at 33 MHz rather than the standard method of allowing the PMC board to control whether the bus runs at 33 MHz or 66 MHz No jumper installed allows the PMC board to choose the PCI 0 0 bus speed A jumper installed across pins 1 2 forces PCI bus 0 0 to run at 33 MHz 1 2 Enables COP J20 factory configuration 1 2 J20 emulator debug Disables COP enables boundary ...

Page 35: ...always enabled PCI Bus 1 0 Speed Header J29 A 2 pin planar header that can force PCI bus 1 0 to run at 33 MHz rather than the standard method of allowing the PMC board to control whether the bus runs at 33 MHz or 66 MHz No jumper installed allows the PMC board to choose the PCI 1 0 bus speed A jumper installed across pins 1 2 forces PCI bus 1 0 to run at 33 MHz J27 1 2 3 1 2 3 Always SCON J27 J27 ...

Page 36: ... The jumper must be installed in order to program any of the EEPROMs at addresses A0 A6 A8 and or AA Setting the PMC Vio Keying Pin Signalling voltage Vio is determined by the location of the PMC Vio keying pin Each site can be independently configured for either 5V or 3 3V signalling The option selected can be determined by observing the location of the Vio keying pin 1 2 Disables EEPROM J30 fact...

Page 37: ...nel that might fill that slot 3 Install the top and bottom edge of the MVME5500 into the guides of the chassis Warning Warning Only use injector handles for board insertion to avoid damage deformation to the front panel and or PCB 4 Ensure that the levers of the two injector ejectors are in the outward position 5 Slide the MVME5500 into the chassis until resistance is felt 6 Simultaneously move th...

Page 38: ...nments of the connectors listed below Note If a PMC module is plugged into PMC slot 1 the memory mezzanine card cannot be used because the PMC module covers the memory mezzanine connector Table 1 3 MVME5500 Connectors Connector Function J1 COM1 front panel connector J2 Dual 1000 100 10BaseT front panel connectors J3 IPMC connector J4 PCI PMC expansion connector J5 CPU COP connector J11 J12 J13 J14...

Page 39: ... 19 1 Completing the Installation Verify that hardware is installed and the power peripheral cables connected are appropriate for your system configuration Replace the chassis or system cover reconnect the system to the AC or DC power source and turn the equipment power on ...

Page 40: ......

Page 41: ...rify that the chassis power supply voltage setting matches the voltage present in the country of use if the power supply in your system is not auto sensing On powering up the MVME5500 brings up the MotLoad prompt MVME5500 Switches and Indicators The MVME5500 board provides a single pushbutton switch that provides both Abort and Reset ABT RST functions When the switch is depressed for less than thr...

Page 42: ...or other software to indicate a configuration problem or other failure CPU connected to a CPU bus control signal to indicate bus activity The following table describes these indicators Table 2 1 Front Panel LED Status Indicators Function Label Color Description CPU Bus Activity CPU Green CPU bus is busy Board Fail BFL Yellow Board has a failure ...

Page 43: ...ooted A secondary function of the MOTLoad firmware is to serve in some respects as a test suite providing individual tests for certain devices MOTLoad is controlled through an easy to use UNIX like command line interface The MOTLoad software package is similar to many end user applications designed for the embedded market such as the real time operating systems currently available Refer to the MOT...

Page 44: ...ons are configuration data status displays data manipulation help routines data status monitors etc Operationally MOTLoad utility applications differ from MOTLoad test applications in several ways Only one utility application operates at any given time that is multiple utility applications can not be executing concurrently Utility applications may interact with the user Most test applications do n...

Page 45: ...irectly tested There are a few exceptions to the device path string requirement like testing RAM which is not considered a true device and can be directly tested without a device path string Refer to the devShow command description page in the MOTLoad Firmware Package User s Manual Most MOTLoad tests can be organized to execute as a group of related tests a testSuite through the use of the testSui...

Page 46: ...d then performs the specified action An example of a MOTLoad command line prompt is shown below The MOTLoad prompt changes according to what product it is used on for example MVME5500 MVME6100 Example MVME5500 If an invalid MOTLoad command is entered at the MOTLoad command line prompt MOTLoad displays a message that the command was not found Example MVME5500 mytest mytest not found MVME5500 If the...

Page 47: ... command MOTLoad will inform the user that the command was ambiguous Example MVME5500 te te ambiguous MVME5500 Command Line Help Each MOTLoad firmware package has an extensive product specific help facility that can be accessed through the help command The user can enter help at the MOTLoad command line to display a complete listing of all available tests and utilities Example MVME5500 help For he...

Page 48: ...member when entering a MOTLoad command Multiple commands are permitted on a single command line provided they are separated by a single semicolon Spaces separate the various fields on the command line command arguments options The argument option identifier character is always preceded by a hyphen character Options are identified by a single character Option arguments immediately follow no spaces ...

Page 49: ...rd Word bdTempShow Display Current Board Temperature bfb bfh bfw Block Fill Byte Halfword Word blkCp Block Copy blkFmt Block Format blkRd Block Read blkShow Block Show Device Configuration Data blkVe Block Verify blkWr Block Write bmb bmh bmw Block Move Byte Halfword Word br Assign Delete Display User Program Break Points bsb bsh bsw Block Search Byte Halfword Word bvb bvh bvw Block Verify Byte Ha...

Page 50: ...ry Device Configuration Data gd Go Execute User Program Direct Ignore Break Points gevDelete Global Environment Variable Delete gevDump Global Environment Variable s Dump NVRAM Header Data gevEdit Global Environment Variable Edit gevInit Global Environment Variable Area Initialize NVRAM Header gevList Global Environment Variable Labels Names Listing gevShow Global Environment Variable Show gn Go E...

Page 51: ...etShow Display Network Interface Configuration Data netShut Disable Shutdown Network Interface netStats Display Network Interface Statistics Data noCm Turns off Concurrent Mode pciDataRd Read PCI Device Configuration Header Register pciDataWr Write PCI Device Configuration Header Register pciDump Dump PCI Device Configuration Header Register pciShow Display PCI Device Configuration Header Register...

Page 52: ...PtP Ethernet Point to Point testFlash Flash Memory Erase Write Verify testl2cRomRd I2C ROM Read testNvramRd NVRAM Read testNvramRdWr NVRAM Read Write Destructive testRam RAM Test Directory testRamAddr RAM Addressing testRamAlt RAM Alternating testRamBitToggle RAM Bit Toggle testRamBounce RAM Bounce testRamCodeCopy RAM Code Copy and Execute testRamEccMonitor Monitor for ECC Errors testRamMarch RAM ...

Page 53: ...st Suite testSuiteMake Make Create Test Suite testUsbOscillator USB Oscillator testUsbVok USB Vok testWatchdogTimer Tests the accuracy of the watchdog timer device tftpGet TFTP Get tftpPut TFTP Put time Display Date and Time transparentMode Transparent Mode Connect to Host tsShow Display Task Status upLoad Up Load Binary Data from Target version Display Version String s vmeCfg Manages user specifi...

Page 54: ...sabled PCI Slave Image 1 Control C0820000 Sets LSI1_CTL to indicate that this image is enabled write posting is enabled VMEbus data width is 32 bits VMEbus address space is A32 data and non supervisory AM encoding no BLT transfers to the VMEbus and to accept addresses in PCI memory space PCI Slave Image 1 Base Address Register 91000000 Sets LSI1_BS to indicate that the lower bound of PCI memory ad...

Page 55: ...PCI Slave Image 2 Translation Offset 400000000 Sets LSI2_TO to indicate that the PCI memory address is to be translated by 0x40000000 before presentation on the VMEbus the result of the translation is 0xB0000000 0x40000000 0xF0000000 thus 0xF0000000 on the VMEbus PCI Slave Image 3 Control C0400000 Sets LSI3_CTL to indicate that this image is enabled write posting is enabled VMEbus data width is 16...

Page 56: ...les are disabled and to transfer into PCI memory space VMEbus Slave Image 0 Base Address Register 00000000 Sets VSI0_BS to define the lower bound of VME addresses to be transferred to the local PCI bus is 0x00000000 VMEbus Slave Image 0 Bound Address Register Local DRAM Size Sets VSI0_BD to define that the upper bound of VME addresses to be equal to the size of local DRAM VMEbus Slave Image 0 Tran...

Page 57: ...us request level 3 request mode Demand Release When Done align PCI transfers on 32 bytes and use PCI bus 0 Miscellaneous Control Register 52040000 Sets MISC_CTL register to utilize 256 second VMEbus timeout round robin arbitration 256 second arbitration timeout do not use BI mode and assertion of VIRQ1 is to be ignored User AM Codes 40400000 Sets USER_AM to indicate a user AM code of 0 The resulti...

Page 58: ...mper setting See the VME64 Specification and the VME64 Extensions for details As a result a 512K byte CR CSR area can be accessed from the VMEbus using the CR CSR AM code Displaying VME Settings To display the changeable VME setting type the following at the firmware prompt vmeCfg s m Displays Master Enable state vmeCfg s i 0 7 Displays selected Inbound Window state vmeCfg s o 0 7 Displays selecte...

Page 59: ... prompt vmeCfg e m Edits Master Enable state vmeCfg e i 0 7 Edits selected Inbound Window state vmeCfg e o 0 7 Edits selected Outbound Window state vmeCfg e r184 Edits PCI Miscellaneous Register state vmeCfg e r188 Edits Special PCI Target Image Register state vmeCfg e r400 Edits Master Control Register state vmeCfg e r404 Edits Miscellaneous Control Register state vmeCfg e r40C Edits User AM Code...

Page 60: ...state vmeCfg d r184 Deletes PCI Miscellaneous Register state vmeCfg d r188 Deletes Special PCI Target Image Register state vmeCfg d r400 Deletes Master Control Register state vmeCfg d r404 Deletes Miscellaneous Control Register state vmeCfg d r40C Deletes User AM Codes Register state vmeCfg d rF70 Deletes VMEbus Register Access Image Control Register state Restoring Default VME Settings To restore...

Page 61: ...CR CSR space for a board in the 4th slot will start at 0x0020 0000 CR CSR space for a board in the 5th slot will start at 0x0028 0000 CR CSR space for a board in the 6th slot will start at 0x0030 0000 CR CSR space for a board in the 7th slot will start at 0x0038 0000 CR CSR space for a board in the 8th slot will start at 0x0040 0000 CR CSR space for a board in the 9th slot will start at 0x0048 000...

Page 62: ...er remote start is enabled default or disabled Refer to the Remote Start chapter in the MOTLoad Firmware Package User s Manual for remote start GEV definitions The MVME5500 s IBCA needs to be mapped appropriately through the master s VMEbus bridge For example to use remote start using mailbox 0 on an MVME5500 installed in slot 5 the master would need a mapping to support reads and writes of addres...

Page 63: ...nsion connector for a mezzanine board with two banks for 512MB using 256Mb devices Double bit error detect single bit error correct across 72 bits Bus clock frequency at 133 MHz Memory Controller Provided by GT 64260B Supports one to four banks of SDRAM for up to 1GB per bank Processor Host Bridge Provided by GT 64260B Supports MPX mode or 60x mode PCI Interfaces Provided by GT 64260B Two independ...

Page 64: ... storage NVRAM 32KB provided by MK48T37 Real Time Clock Provided by MK48T37 Watchdog Timers One in GT 64260B One in MK48T37 Each watchdog timer can generate interrupt or reset software selectable On board Peripheral Support One 10 100 1000BaseT Ethernet interface one 10 100BaseT Ethernet interface Dual 16C550 compatible UARTs PCI Mezzanine Cards Two PMC sites one shared with the expansion memory a...

Page 65: ...pin CBGA package The processor consists of a processor core an internal 256KB L2 and an internal L3 tag and controller which supports a backside L3 cache L3 Cache The MVME5500 uses two 8Mb DDR synchronous SRAM devices for the processor s L3 cache data SRAM This gives the processor a total of 2MB of L3 cache These SRAM devices require a 2 5V core voltage The ...

Page 66: ...ree 10 100Mb Ethernet MAC ports two ports not used A DMA engine for moving data between the buses An interrupt controller An I2C device controller PowerPC bus arbiter Counter timers Watchdog timer Each of the device buses are de coupled from each other enabling concurrent operation of the CPU bus PCI buses and access to SDRAM Refer to the GT 64260B System Controller for PowerPC Processors Data She...

Page 67: ...s LAN interrupts VME interrupts RTC interrupt Watchdog timer interrupts Abort switch interrupt External UART interrupts The interrupt controller provides up to seven interrupt output pins for various interrupt functions For additional details regarding the external interrupt assignments refer to the MVME5500 Single Board Computer Programmer s Reference Guide I2C Serial Interface and Devices A two ...

Page 68: ... an 8 channel DMA controller integrated in the device Each DMA channel is capable of moving data between any source and any destination This controller can be programmed to move up to 16MB of data per transaction The GT 64260B DMA channels also support chained mode of operation For additional details regarding the GT 64260B DMA capability refer to the GT 64260B System Controller for PowerPC Proces...

Page 69: ...rocessors Data Sheet listed in Appendix D Related Documentation Flash Memory The MVME5500 contains two banks of Flash memory accessed via the device controller contained within the GT 64260B The standard MVME5500 product is built with the 128Mb devices System Memory System memory for the MVME5500 is provided by one to four banks of ECC synchronous DRAM in two banks During system initialization the...

Page 70: ...thernet 1 It also supports 100BaseTX and 10BaseT modes of operation The Ethernet interface is accessed via an industry standard front panel mounted RJ 45 connector 10 100Mb Ethernet Interface The 10 100Mb Ethernet interface Ethernet 2 comes from the GT 64260B and connects to an external PHY This port can be routed to a front panel RJ 45 connector or to the P2 connector with user configurable jumpe...

Page 71: ...CI Bus 1 0 of the GT 64260B and is also 66 MHz capable Note If a PMC module is plugged into PMC slot 1 the memory mezzanine card cannot be used because the PMC module covers the memory mezzanine connector PCI IDSEL Definition PCI device configuration registers are accessed by using the IDSEL signal of each PCI agent to an A D signal as defined in the Peripheral Component Interconnect PCI Local Bus...

Page 72: ...faces to an on board 9 pin header refer to Chapter 5 Pin Assignments for more details An on board 1 8432 MHz oscillator provides the baud rate clock for the UARTs Figure 4 2 COM1 Asynchronous Serial Port Connections RJ 45 Real Time Clock and NVRAM The SGS Thomson M48T37V is used by the MVME5500 board to provide 32KB of non volatile static RAM real time clock and watchdog timer The watchdog timer i...

Page 73: ...he surface mount process The battery housing is keyed to prevent reverse insertion System Control and Status Registers The MVME5500 CPU board contains System Control and Status Registers mapped into Bank 1 of the GT 64260B device bus interface Refer for the MMVE5500 Single Board Computer Programmer s Reference Guide for details Sources of Reset The sources of reset on the MVME5500 are the followin...

Page 74: ...n The MVME5500 provides a PMC expansion connector to add more PMC interfaces than the two on the MVME5500 board The connector is a Mictor AMP 767096 3 connector Debug Support The MVME5500 provides a boundary scan header J18 and a COP Riscwatch header for debug capability ...

Page 75: ...MC 2 Interface Connectors J21 J22 J23 J24 on page 5 16 Asynchronous Serial Port COM2 Planar Connector J33 on page 5 22 VMEbus Connectors P1 P2 PMC Mode on page 5 22 VMEbus Connectors P1 P2 SBC Mode on page 5 25 Memory Expansion Connector P4 on page 5 29 The following headers are described in this chapter Ethernet 2 PMC SBC Mode and P2 I O Selection Headers J6 J7 J28 J32 J34 J97 J110 on page 5 33 F...

Page 76: ... 44 PCI Bus 1 0 Speed Header J29 on page 5 44 EEPROM Write Protect Header J30 on page 5 45 Connectors Asynchronous Serial Port Connector J1 An RJ 45 receptacle is located on the front panel of the MVME5500 board to provide the interface to the COM1 serial port The pin assignments for this connector are as follows Table 5 1 COM1 Connector J1 Pin Assignments Pin Signal 1 DCD 2 RTS 3 GNDC 4 TXD 5 RXD...

Page 77: ...85 is used to provide a planar interface to IPMC module signals This receptacle mates with the Molex 53627 plug thus providing the 10 0 mm stacking height of the PMC card The pin assignments for this connector are as follows Table 5 2 Ethernet Connector J2 Pin Assignments Pin 1000BaseTX 10 100BaseT 1 MDIO0_P TD 2 MDIO0_N TD 3 MDIO1_P RD 4 MDIO2_P AC Terminated 5 MDIO2_N AC Terminated 6 MDIO1_N RD ...

Page 78: ...1 12 13 DB12 GND 14 15 GND DB13 16 17 DB14 3 3V 18 19 3 3V DB15 20 21 DBP1 GND 22 23 GND No Connect 24 25 IPMC_INT 3 3V 26 27 3 3V REQ 28 29 GNT GND 30 31 GND 3 3V 32 33 5 0V 5 0V 34 35 GND GND 36 37 5 0V 5 0V 38 39 GND GND 40 Table 5 3 IPMC Connector J3 Pin Assignments Pin Signal Signal Pin ...

Page 79: ...nments for this connector are as follows Table 5 4 PCI PMC Expansion Connector J4 Pin Assignments Pin Signal Signal Pin 1 3 3V GND 3 3V 2 3 PCICLK PMCINTA 4 5 GND PMCINTB 6 7 PURST PMCINTC 8 9 HRESET PMCINTD 10 11 TDO TDI 12 13 TMS TCK 14 15 TRST PCIXP 16 17 PCIXGNT PCIXREQ 18 19 12V 12V 20 21 PERR SERR 22 23 LOCK SDONE 24 25 DEVSEL SBO 26 27 GND GND 28 29 TRDY IRDY 30 31 STOP FRAME 32 33 GND GND ...

Page 80: ... AD0 46 47 AD3 AD2 48 49 AD5 AD4 50 51 AD7 AD6 52 53 AD9 AD8 54 55 AD11 AD10 56 57 AD13 AD12 58 59 AD15 AD14 60 61 AD17 AD16 62 63 AD19 AD18 64 65 AD21 AD20 66 67 AD23 AD22 68 69 AD25 AD24 70 71 AD27 AD26 72 73 AD29 AD28 74 75 AD31 AD30 76 Table 5 4 PCI PMC Expansion Connector J4 Pin Assignments continued Pin Signal Signal Pin ...

Page 81: ...D32 84 85 AD35 AD34 86 87 AD37 AD36 88 89 AD39 AD38 90 91 AD41 AD40 92 93 AD43 AD42 94 95 AD45 AD44 96 97 AD47 AD46 98 99 AD49 AD48 100 101 AD51 AD50 102 103 AD53 AD52 104 105 AD55 AD54 106 107 AD57 AD56 108 109 AD59 AD58 110 111 AD61 AD60 112 113 AD63 AD62 114 Table 5 4 PCI PMC Expansion Connector J4 Pin Assignments continued Pin Signal Signal Pin ...

Page 82: ...tors J11 J12 J13 J14 There are four 64 pin SMT connectors for the PMC 1 slot on the MVME5500 to provide a 32 64 bit PCI interface and optional I O interface Table 5 5 CPU COP Connector J5 Pin Assignments Pin Signal Signal Pin 1 CPUTDO QACK_L 2 3 CPUTDI CPUTRST_L 4 5 QREQ_L 2 5V_VIO 6 7 CPUTCK OPTPU_2 5v 8 9 CPUTMS NC 10 11 SRESET_L NC 12 13 CPURST_L KEY no pin 14 15 CHECKSTPO_L GND 16 ...

Page 83: ...e connector Table 5 6 PMC 1 Connector J11 Pin Assignments Pin Signal Signal Pin 1 TCK 12V 2 3 GND INTA 4 5 INTB INTC 6 7 PRESENT 5V 8 9 INTD PCI_RSVD 10 11 GND 3 3Vaux 12 13 CLK GND 14 15 GND GNT XREQ0 16 17 REQ XGNT0 5V 18 19 VIO AD31 20 21 AD28 AD27 22 23 AD25 GND 24 25 GND C BE3 26 27 AD22 AD21 28 29 AD19 5V 30 31 VIO AD17 32 33 FRAME GND 34 35 GND IRDY 36 37 DEVSEL 5V 38 39 GND LOCK 40 41 PCI_...

Page 84: ... AD02 AD01 60 61 AD00 5V 62 63 GND REQ64 64 Table 5 7 PMC 1 Connector J12 Pin Assignments Pin Signal Signal Pin 1 12V TRST 2 3 TMS TDO 4 5 TDI GND 6 7 GND PCI_RSVD 8 9 PCI_RSVD PCI_RSVD 10 11 MOT_RSVD 3 3V 12 13 RST MOT_RSVD 14 15 3 3V MOT_RSVD 16 17 PME GND 18 19 AD30 AD29 20 21 GND AD26 22 23 AD24 3 3V 24 Table 5 6 PMC 1 Connector J11 Pin Assignments Pin Signal Signal Pin ...

Page 85: ... 32 33 GND IDSELB 34 35 TRDY 3 3V 36 37 GND STOP 38 39 PERR GND 40 41 3 3V SERR 42 43 C BE1 GND 44 45 AD14 AD13 46 47 M66EN AD10 48 49 AD08 3 3V 50 51 AD07 REQB_L 52 53 3 3V GNTB_L 54 55 MOT_RSVD GND 56 57 MOT_RSVD EREADY 58 59 GND NC RESETOUT_L 60 61 ACK64 3 3V 62 63 GND NC MONARCH 64 Table 5 7 PMC 1 Connector J12 Pin Assignments Pin Signal Signal Pin ...

Page 86: ... BE7 4 5 C BE6 C BE5 6 7 C BE4 GND 8 9 VIO PAR64 10 11 AD63 AD62 12 13 AD61 GND 14 15 GND AD60 16 17 AD59 AD58 18 19 AD57 GND 20 21 VIO AD56 22 23 AD55 AD54 24 25 AD53 GND 26 27 GND AD52 28 29 AD51 AD50 30 31 AD49 GND 32 33 GND AD48 34 35 AD47 AD46 36 37 AD45 GND 38 39 VIO AD44 40 41 AD43 AD42 42 43 AD41 GND 44 45 GND AD40 46 47 AD39 AD38 48 49 AD37 GND 50 ...

Page 87: ... PMC1_4 P2 A2 4 5 PMC1_5 P2 C3 PMC1_6 P2 A3 6 7 PMC1_7 P2 C4 PMC1_8 P2 A4 8 9 PMC1 _9 P2 C5 PMC1_10 P2 A5 10 11 PMC1_11 P2 C6 PMC1_12 P2 A6 12 13 PMC1_13 P2 C7 PMC1_14 P2 A7 14 15 PMC1_15 P2 C8 PMC1_16 P2 A8 16 17 PMC1_17 P2 C9 PMC1_18 P2 A9 18 19 PMC1_19 P2 C10 PMC1_20 P2 A10 20 21 PMC1_21 P2 C11 PMC1_22 P2 A11 22 23 PMC1_23 P2 C12 PMC1_24 P2 A12 24 25 PMC1_25 P2 C13 PMC1_26 P2 A13 26 27 PMC1_27 ...

Page 88: ...P2 A21 42 43 PMC1_43 P2 C22 PMC1_44 P2 A22 44 45 PMC1_45 P2 C23 PMC1_46 P2 A23 46 47 PMC1_47 P2 C24 PMC1_48 P2 A24 48 49 PMC1_49 P2 C25 PMC1_50 P2 A25 50 51 PMC1_51 P2 C26 PMC1_52 P2 A26 52 53 PMC1_53 P2 C27 PMC1_54 P2 A27 54 55 PMC1_55 P2 C28 PMC1_56 P2 A28 56 57 PMC1_57 P2 C29 PMC1_58 P2 A29 58 59 PMC1_59 P2 C30 PMC1_60 P2 A30 60 61 PMC1_61 P2 C31 PMC1_62 P2 A31 62 63 PMC1_63 P2 C32 PMC1_64 P2 A...

Page 89: ...ary scan connector is used to provide boundary scan testing of all on board JTAG devices in a single scan chain Table 5 10 Boundary Scan Connector J18 Pin Assignments Pin Signal Signal Pin 1 TRST_L GND 2 3 TDO GND 4 5 TDI GND 6 7 TMS GND 8 9 TCK GND 10 11 NC GND 12 13 AW GND 14 15 NC GND 16 17 NC GND 18 19 NC NC 20 ...

Page 90: ...ional I O interface Table 5 11 PMC 2 Connector J21 Pin Assignments Pin Signal Signal Pin 1 TCK 12V 2 3 GND INTA 4 5 INTB INTC 6 7 PRESENT 5V 8 9 INTD PCI_RSVD 10 11 GND 3 3Vaux 12 13 CLK GND 14 15 GND GNT XREQ0 16 17 REQ XGNT0 5V 18 19 VIO AD31 20 21 AD28 AD27 22 23 AD25 GND 24 25 GND C BE3 26 27 AD22 AD21 28 29 AD19 5V 30 31 VIO AD17 32 33 FRAME GND 34 35 GND IRDY 36 37 DEVSEL 5V 38 39 GND LOCK 4...

Page 91: ...04 GND 56 57 VIO AD03 58 59 AD02 AD01 60 61 AD00 5V 62 63 GND REQ64 64 Table 5 12 PMC 2 Connector J22 Pin Assignments Pin Signal Signal Pin 1 12V TRST 2 3 TMS TDO 4 5 TDI GND 6 7 GND PCI_RSVD 8 9 PCI_RSVD PCI_RSVD 10 11 MOT_RSVD 3 3V 12 13 RST MOT_RSVD 14 15 3 3V MOT_RSVD 16 17 PME GND 18 19 AD30 AD29 20 21 GND AD26 22 Table 5 11 PMC 2 Connector J21 Pin Assignments Pin Signal Signal Pin ...

Page 92: ... GND IDSELB 34 35 TRDY 3 3V 36 37 GND STOP 38 39 PERR GND 40 41 3 3V SERR 42 43 C BE1 GND 44 45 AD14 AD13 46 47 M66EN AD10 48 49 AD08 3 3V 50 51 AD07 REQB_L 52 53 3 3V GNTB_L 54 55 MOT_RSVD GND 56 57 MOT_RSVD EREADY 58 59 GND NC RESETOUT_L 60 61 ACK64 3 3V 62 63 GND NC MONARCH 64 Table 5 12 PMC 2 Connector J22 Pin Assignments Pin Signal Signal Pin ...

Page 93: ... GND 2 3 GND C BE7 4 5 C BE6 C BE5 6 7 C BE4 GND 8 9 VIO PAR64 10 11 AD63 AD62 12 13 AD61 GND 14 15 GND AD60 16 17 AD59 AD58 18 19 AD57 GND 20 21 VIO AD56 22 23 AD55 AD54 24 25 AD53 GND 26 27 GND AD52 28 29 AD51 AD50 30 31 AD49 GND 32 33 GND AD48 34 35 AD47 AD46 36 37 AD45 GND 38 39 VIO AD44 40 41 AD43 AD42 42 43 AD41 GND 44 45 GND AD40 46 47 AD39 AD38 48 49 AD37 GND 50 ...

Page 94: ... 5 PMC2_5 P2 Z3 PMC2_6 P2 D4 6 7 PMC2_7 P2 D5 PMC2_8 P2 Z5 8 9 PMC2_9 P2 D6 PMC2_10 P2 D7 10 11 PMC2_11 P2 Z7 PMC2_12 P2 D8 12 13 PMC2_13 P2 D9 PMC2_14 P2 Z9 14 15 PMC2_15 P2 D10 PMC2_16 P2 D11 16 17 PMC2_17 P2 Z11 PMC2_18 P2 D12 18 19 PMC2_19 P2 D13 PMC2_20 P2 Z13 20 21 PMC2_21 P2 D14 PMC2_22 P2 D15 22 23 PMC2_23 P2 Z15 PMC2_24 P2 D16 24 25 PMC2_25 P2 D17 PMC2_26 P2 Z17 26 27 PMC2_27 P2 D18 PMC2_...

Page 95: ...5 38 39 PMC2_39 P2 D26 PMC2_40 P2 D27 40 41 PMC2_41 P2 Z27 PMC2_42 P2 D28 42 43 PMC2_43 P2 D29 PMC2_44 P2 Z29 44 45 PMC2_45 P2 D30 PMC2_46 P2 Z31 46 47 Not Used Not Used 48 49 Not Used Not Used 50 51 Not Used Not Used 52 53 Not Used Not Used 54 55 Not Used Not Used 56 57 Not Used Not Used 58 59 Not Used Not Used 60 61 Not Used Not Used 62 63 Not Used Not Used 64 Table 5 14 PMC 2 Connector J24 Pin ...

Page 96: ... D Related Documentation for the link to this specification Row B of the P2 connector provides power to the MVME5500 and to the upper eight VMEbus address lines and additional 16 VMEbus data lines The pin assignments for the P2 connector are as follows Warning Warning When J28 is configured for IPMC mode 12V is supplied to P2 pin A30 If there is an incompatible board plugged into this P2 slot dama...

Page 97: ...PMC1_5 J14 5 P2_TX PMC2_4 J24 4 4 GND PMC1_8 J14 8 VA24 PMC1_7 J14 7 P2_TX PMC2_6 J24 6 5 PMC2_8 J24 8 PMC1_10 J14 10 VA25 PMC1_9 J14 9 PMC2_7 J24 7 6 GND PMC1_12 J14 12 VA26 PMC1_11 J14 11 PMC2_9 J24 9 7 PMC2_11 J24 11 PMC1_14 J14 14 VA27 PMC1_13 J14 13 PMC2_10 J24 10 8 GND PMC1_16 J14 16 VA28 PMC1_15 J14 15 PMC2_12 J24 12 9 PMC2_14 J24 14 PMC1_18 J14 18 VA29 PMC1_17 J14 17 PMC2_13 J24 13 10 GND ...

Page 98: ...20 GND PMC1_40 J14 40 VD22 PMC1_39 J14 39 PMC2_30 J24 30 21 PMC2_32 J24 32 PMC1_42 J14 42 VD23 PMC1_41 J14 41 PMC2_31 J24 31 22 GND PMC1_44 J14 44 GND PMC1_43 J14 43 PMC2_33 J24 33 23 PMC2_35 J24 35 PMC1_46 J14 46 VD24 PMC1_45 J14 45 PMC2_34 J24 34 24 GND PMC1_48 J14 48 VD25 PMC1_47 J14 47 PMC2_36 J24 36 25 PMC2_38 J24 38 PMC1_50 J14 50 VD26 PMC1_49 J14 49 PMC2_37 J24 37 26 GND PMC1_52 J14 52 VD27...

Page 99: ...es and additional 16 VMEbus data lines The pin assignments for the P2 connector are as follows Warning Warning When J28 is configured for IPMC mode 12V is supplied to P2 pin A30 If there is an incompatible board plugged into this P2 slot damage may occur When J32 is configured for IPMC mode 12V is supplied to P2 pin C7 If there is an incompatible board plugged into this P2 slot damage may occur 29...

Page 100: ...A26 R PMC2_9 J24 9 7 PMC2_11 DB6 VA27 12V LAN PMC2_10 J24 10 8 GND DB7 VA28 PRSTB PMC2_12 J24 12 9 PMC2 14 DBP VA29 P DB0 PMC2_13 J24 13 10 GND ATN VA30 P DB1 PMC2_15 J24 15 11 PMC2_17 BSY VA31 P DB2 PMC2_16 J24 16 12 GND ACK GND P DB3 PMC2_18 J24 18 13 PMC2_20 RST 5V P DB4 PMC2_19 J24 19 14 GND MSG VD16 P DB5 PMC2_21 J24 21 15 PMC2_23 SEL VD17 P DB6 PMC2_22 J24 22 16 GND D C VD18 P DB7 PMC2_24 J2...

Page 101: ...ND DTR2 GND 32 GND RTXC4 5V DCD2 VPC Table 5 18 VME Connector P2 Pinouts with IPMC761 Pin Row Z Row A Row B Row C Row D 1 DB8 DB0 5V RD 10 100 PMC2_1 J24 1 2 GND DB1 GND RD 10 100 PMC2_3 J24 3 3 DB9 DB2 RETRY TD 10 100 PMC2_4 J24 4 4 GND DB3 VA24 TD 10 100 PMC2_6 J24 6 5 DB10 DB4 VA25 Not Used PMC2_7 J24 7 6 GND DB5 VA26 Not Used PMC2_9 J24 9 7 DB11 DB6 VA27 12VF PMC2_10 J24 10 8 GND DB7 VA28 PRST...

Page 102: ...TXD3 VD23 INIT PMC2_31 J24 31 22 GND RXD3 GND PRFLT PMC2_33 J24 33 23 PMC2_35 J24 35 RTXC3 VD24 TXD1_232 PMC2_34 J24 34 24 GND TRXC3 VD25 RXD1_232 PMC2_36 J24 36 25 PMC2_38 J24 38 TXD4 VD26 RTS1_232 PMC2_37 J24 37 26 GND RXD4 VD27 CTS1_232 PMC2_39 J24 39 27 PMC2_41 J24 41 RTXC4 VD28 TXD2_232 PMC2_40 J24 40 28 GND TRXC4 VD29 RXD2_232 PMC2_42 J24 42 29 PMC2_44 J24 44 VD30 RTS2_232 PMC2_43 J24 43 30 ...

Page 103: ...nterfaces to up to two additional banks of memory The pin assignments for this connector are as follows Note If a PMC module is plugged into PMC slot 1 the memory mezzanine card cannot be used because the PMC module covers the memory mezzanine connector Table 5 19 Memory Expansion Connector P4 Pin Assignments Pin Signal Signal Pin 1 GND GND 2 3 MD0 MD1 4 5 MD2 MD3 6 7 MD4 MD5 8 9 MD6 MD7 10 11 3 3...

Page 104: ... 43 MD32 MD33 44 45 MD34 MD35 46 47 MD36 MD37 48 49 MD38 MD39 50 51 3 3V 3 3V 52 53 MD40 MD41 54 55 MD42 MD43 56 57 MD44 MD45 58 59 MD46 MD47 60 61 GND GND 62 63 MD48 MD49 64 65 MD50 MD51 66 67 MD52 MD53 68 69 3 3V 3 3V 70 71 MD54 MD55 72 73 MD56 MD57 74 75 MD58 MD59 76 77 MD60 MD61 78 Table 5 19 Memory Expansion Connector P4 Pin Assignments continued Pin Signal Signal Pin ...

Page 105: ... BA0 BA1 94 95 MA12 MA11 96 97 MA10 MA9 98 99 GND GND 100 101 MA8 MA7 102 103 MA6 MA5 104 105 MA4 MA3 106 107 MA2 MA1 108 109 3 3V 3 3V 110 111 MA0 B2_CS 112 113 B3_CS GND 114 115 DQM5 DQM7 116 117 SDWE SDRAS 118 119 GND GND 120 121 SDCAS 3 3V 122 123 3 3V DQM6 124 125 DQM5 I2CSCL 126 127 I2CSDA A1_SPD GND 128 Table 5 19 Memory Expansion Connector P4 Pin Assignments continued Pin Signal Signal Pin...

Page 106: ...enter Web Site Pin Assignments 5 129 A0_SPD NC DQM4 130 131 DQM3 DQM2 132 133 GND CLK_MEZZ 134 135 GND 3 3V 136 137 DQM1 DQM0 138 139 GND GND 140 Table 5 19 Memory Expansion Connector P4 Pin Assignments continued Pin Signal Signal Pin ...

Page 107: ...s are for 10 100 BaseT Ethernet 2 selection Ethernet 1 is the Gigabit Ethernet port and is front panel only The pin assignments for these headers are as follows For rear P2 Ethernet install jumpers across pins 2 3 on all four headers J6 J7 J100 and J101 For front panel Ethernet install jumpers across pins 1 2 on all four headers Table 5 20 Ethernet 2 Selection Headers J6 J7 J100 J101 Pin Assignmen...

Page 108: ...t install jumpers on all four headers J34 J97 J98 and J99 when in SBC IPMC761 mode No jumpers are installed for front panel Ethernet PMC SBC Mode Selection Two 3 pin planar headers on the MVME5500 are for PMC SBC mode selection For PMC mode install jumpers across pins 1 2 on both headers For SBC IPMC761 mode install jumpers across pins 2 3 on both headers For SBC IPMC712 mode install a jumper acro...

Page 109: ...into this P2 slot damage may occur Install jumpers across pins 1 2 on both headers to select PMC mode Install jumpers across pins 2 3 on both headers to select SBC IPMC761 mode Install a jumper across pins 2 3 on J32 and install a jumper across pins 1 2 on J28 to select SBC IPMC712 mode P2 I O Selection Nine 3 pin 2 mm planar headers are for P2 I O selection Install jumpers across pins 1 2 on all ...

Page 110: ...l Pin Signal J102 J103 1 PMC2_IO 2 1 PMC2_IO 5 2 P2_PMC2_IO 2 2 P2_PMC2_IO 5 3 IPMC_DB8_L 3 IPMC_DB9_L J104 J105 1 PMC2_IO 8 1 PMC2_IO 11 2 P2_PMC2_IO 8 2 P2_PMC2_IO 11 3 IPMC_DB10_L 3 IPMC_DB11_L J106 J107 1 PMC2_IO 14 1 PMC2_IO 17 2 P2_PMC2_IO 14 2 P2_PMC2_IO 17 3 IPMC_DB12_L 3 IPMC_DB13_L J108 J109 1 PMC2_IO 20 1 PMC2_IO 23 2 P2_PMC2_IO 20 2 P2_PMC2_IO 23 3 IPMC_DB14_L 3 IPMC_DB15_L J110 1 PMC2...

Page 111: ...Ethernet 2 PMC SBC Mode and P2 I O Selection Headers J6 J7 J28 J32 J34 J97 J110 http www motorola com computer literature 5 37 5 Figure 5 1 SBC IPMC712 Mode ...

Page 112: ... A19 A20 P1 C23 to C26 P1 C27 to C30 P1 A21 to A24 P1 C31 C32 A31 A32 J9 6 3 2 1 J7 2 to 5 J4 15 6 to 13 3 1 5 2 14 4 17 16 J1 35 Pair Ethernet 12VF J4 8 P2 A1 C1 A2 C2 J4 7 9 11 to 16 18 20 J4 35 37 39 42 J4 58 60 62 61 J4 32 31 34 33 J4 64 63 54 56 P2 A4 3829 3199 3197 C C T T J14 P2 A25 to A28 Serial MUX P14 P1 A30 J4 51 12VF P1 A25 to A28 J4 44 46 48 50 to 24 26 27 30 P1 Z1 to Z17 odd pins 68 ...

Page 113: ...4 26 28 30 to 35 37 39 42 44 46 48 50 to 52 54 56 58 60 to 64 J3 2 to 64 even pins PMC2_IO 1 3 4 6 7 9 10 12 13 15 16 18 19 21 22 24 25 27 28 30 31 33 34 36 37 39 40 42 43 45 44 46 PMC1_IO 3 1 7 5 11 9 15 13 17 21 19 25 24 29 27 31 33 37 35 41 39 43 38 40 44 42 48 46 45 47 49 51 50 52 54 56 60 58 62 64 53 55 59 57 63 61 J24 2 5 8 11 14 17 20 23 26 J3 P2 Z1 to Z17 odd pins J14 J24 PMC2_IO 46 1 PMC2...

Page 114: ... Flash 0 Programming Enable Header J9 A 2 pin 2 mm planar header enables disables programming of Flash 0 as a means of protecting the contents from being corrupted No jumper installed disables all Flash 0 programming The jumper must be installed in order to erase array blocks programming data or configuring lock bits The pin assignments for this header are as follows Table 5 24 Flash Boot Bank Sel...

Page 115: ...otect Header J15 A 2 pin 2 mm planar header supports the Intel K3 Flash family write protect feature No jumper installed enables the lock down mechanism Blocks locked down cannot be unlocked with the unlock command The jumper must be installed in order to override the lock down function and enable blocks to be erased or programmed through software Refer to the Intel K3 Flash data sheet for further...

Page 116: ...initialization sequence The pin assignments for this header are as follows Bus Mode Select Header J19 A 3 pin 2 mm planar header selects the processor bus operating mode No jumper or a jumper across pins 1 2 selects the 60x bus mode while a jumper across pins 2 3 selects the MPX bus mode The pin assignments for this header are as follows Table 5 28 SROM Initialization Enable Header J17 Pin Assignm...

Page 117: ...ed Header J25 A 2 pin 2 mm planar header provides the capability to force PCI Bus 0 0 to run at 33 MHz rather than allowing the PMC to control the bus to run at 33 or 66 MHz No jumper installed allows the PMC to choose the PCI Bus 0 0 speed A jumper installed across pins 1 2 forces PCI Bus 0 0 to run at 33 MHz The pin assignments for this header are as follows Table 5 30 COP Enable Header J20 Pin ...

Page 118: ...or this header are as follows PCI Bus 1 0 Speed Header J29 A 2 pin 2 mm planar header provides the capability to force PCI Bus 1 0 to run at 33 MHz rather than allowing the PMC to control the bus to run at 33 or 66 MHz No jumper installed allows the PMC to choose the PCI Bus 1 0 speed A jumper installed across pins 1 2 forces PCI Bus 1 0 to run at 33 MHz The pin assignments for this header are as ...

Page 119: ...EEPROMs as a means of protecting the contents from being corrupted No jumper installed disables EEPROM programming by driving the WP pin to a logic high The jumper must be installed in order to program any of the EEPROMs at addresses A0 A6 A8 and or AA The pin assignments for this header are as follows Table 5 34 EEPROM Write Protect Header J30 Pin Assignments Pin Signal 1 I2CWP 2 GND ...

Page 120: ......

Page 121: ...and maximum current required from each of the input supply voltages Note In a 3 row chassis PMC current should be limited to 19 8 watts total of both PMC slots In a 5 row chassis PMC current should be limited to 46 2 watts total of both PMC slots Table A 1 Power Requirements Model Power MVME5500 0163 Typical 6 62 A 5V Maximum 7 94 A 5V MVME5500 0163 with memory mezzanine Typical 7 46A 5V Maximum 8...

Page 122: ...Temperature 0 to 55 C forced air cooling required 400 LFM linear feet per minute of forced air cooling is recommended for operation in the upper temperature range Storage Temperature 40 to 70 C Relative Humidity Operating 5 to 90 non condensing Non operating 5 to 95 non condensing Vibration Non operating 1 G sine sweep 5 100 Hz horizontal and vertical NEBS1 Physical Dimensions 6U 4HP wide 233 mm x...

Page 123: ...the features of the RAM5500 memory expansion module Functional Description The following sections describe the physical and electrical structure of the RAM5500 memory expansion module RAM5500 Description The RAM5500 is a memory expansion module that is used on the MVME5500 single board computer It is based on a single memory Table B 1 RAM5500 Feature Summary Form Factor Dual sided mezzanine SROM S...

Page 124: ...ed by the memory controller for configuration Refer to the MVME5500 Single Board Computer Programmer s Reference Guide V5500A PG for more information The RAM5500 memory expansion module is connected to the host board with a 140 pin AMP 4mm Free Height plug connector This memory expansion module draws 3 3V through this connector The RAM5500 SPD uses the SPD JEDEC standard definition and is accessed...

Page 125: ...er to and proceed as follows 1 Attach an ESD strap to your wrist Attach the other end of the ESD strap to the chassis as a ground The ESD strap must be secured to your wrist and to ground throughout the procedure 2 Perform an operating system shutdown Turn the AC or DC power off and remove the AC cord or DC power lines from the system Remove the chassis or system cover s as necessary for access to...

Page 126: ...ace 6 Turn the entire assembly over and fasten the four short Phillips screws to the standoffs of the RAM5500 7 Reinstall the MVME5500 assembly in its proper card slot Be sure the host board is well seated in the backplane connectors Do not damage or bend connector pins 8 Replace the chassis or system cover s reconnect the system to the AC or DC power source and turn the equipment power on 4237 09...

Page 127: ...AMP receptacle assemblies or AMP GIGA assemblies with ground plates Refer to Memory Expansion Connector P4 on page 5 29 for the P4 pin assignments Table B 2 RAM5500 Connector P1 Pin Assignments 1 GND GND 2 3 DQ00 DQ01 4 5 DQ02 DQ03 6 7 DQ04 DQ05 8 9 DQ06 DQ07 10 11 3 3V 3 3V 12 13 DQ08 DQ09 14 15 DQ10 DQ11 16 17 DQ12 DQ13 18 19 DQ14 DQ15 20 21 GND GND 22 23 DQ16 DQ17 24 25 DQ18 DQ19 26 27 DQ20 DQ2...

Page 128: ... 3V 3 3V 52 53 DQ40 DQ41 54 55 DQ42 DQ43 56 57 DQ44 DQ45 58 59 DQ46 DQ47 60 61 GND GND 62 63 DQ48 DQ49 64 65 DQ50 DQ51 66 67 DQ52 DQ53 68 69 3 3V 3 3V 70 71 DQ54 DQ55 72 73 DQ56 DQ57 74 75 DQ58 DQ59 76 77 DQ60 DQ61 78 79 GND GND 80 81 DQ62 DQ63 82 83 CKD00 CKD01 84 85 CKD02 CKD03 86 87 CKD04 CKD05 88 89 3 3V 3 3V 90 Table B 2 RAM5500 Connector P1 Pin Assignments ...

Page 129: ...103 A06 A05 104 105 A04 A03 106 107 A02 A01 108 109 3 3V 3 3V 110 111 A00 CS_C_L 112 113 CS_D_L GND 114 115 DQM8 DQM7 116 117 WE_L RAS_L 118 119 GND GND 120 121 CAS_L 3 3V 122 123 3 3V DQM6 124 125 DQM5 SCL 126 127 SDA A1_SPD 128 129 A0_SPD DQM4 130 131 DQM3 DQM2 132 133 GND SDRAMCLK1 134 135 GND 3 3V 136 137 DQM1 DQM0 138 139 GND GND 140 Table B 2 RAM5500 Connector P1 Pin Assignments ...

Page 130: ...ircuits These ground contacts mate with grounding plates on both sides of the plug assemblies RAM5500 Programming Issues The RAM5500 contains no user programmable register other than the SPD data Serial Presence Detect SPD Data This register is partially described for the RAM5500 within the MVME5500 Single Board Computer Programmer s Reference Guide The register is accessed through the I2C interfa...

Page 131: ...ation It identifies thermally significant components and lists the corresponding maximum allowable component operating temperatures It also provides example procedures for component level temperature measurements Thermally Significant Components The following table summarizes components that exhibit significant temperature rises These are the components that should be monitored in order to assess ...

Page 132: ...nificant Components Reference Designator Generic Description Max Allowable Component Temperature deg C Measurement Location U2 U3 Flash soldered 85 Ambient U16 Gigabit Ethernet 119 Case U22 System controller 110 Case U24 MPC7455 processor 103 Case U25 VME to PCI bridge 70 Ambient U27 Clock buffer 95 Case U31 PCI bridge 70 Ambient U41 43 U45 47 U54 56 U60 62 U64 66 U67 69 SDRAM 85 Case U123 124 L3 ...

Page 133: ...M1 ABT RST 10 100 CPU BFL ENET 2 ENET 1 J5 J18 J20 J27 J30 J10 J17 J9 J15 J16 J19 J25 J29 J28 U22 J8 J3 J1 J2 P4 J13 J14 J11 J12 J23 J24 J21 J22 P1 P2 XU2 XU1 U25 U16 U19 GigE PMC 1 PMC 2 J6 J100 J98 J99 J97 J33 J32 J4 U8 U10 U11 U12 U20 U9 U17 U15 U129 U23 U27 U2 U3 U13 U14 U4 U5 U6 U7 U26 U1 U18 U28 U29 U30 J101 J7 U31 U24 U124 U123 J102 J110 U125 U126 ...

Page 134: ...ponents Secondary Side 4203 0203 U76 U71 U70 U77 U82 U81 U80 U79 U78 U85 U90 U89 U88 U87 U86 U72 U73 U59 U53 U52 U58 U44 U32 U33 U38 U39 U40 U34 U35 U36 U37 U74 U83 U48 U57 U92 U96 U100 U99 U97 U75 U98 U63 U49 U50 U51 U67 U60 U64 U54 U41 U45 U68 U61 U65 U55 U42 U46 U69 U62 U66 U56 U43 U47 ...

Page 135: ...een reached Measuring Junction Temperature Some components have an on chip thermal measuring device such as a thermal diode For instructions on measuring temperatures using the on board device refer to the component manufacturer s documentation listed in Appendix D Related Documentation Measuring Case Temperature Measure the case temperature at the center of the top of the component Make sure ther...

Page 136: ...ote Machining a heatsink base reduces the contact area between the heatsink and the electrical component You can partially compensate for this effect by filling the machined areas with thermal grease The grease should not contact the thermocouple junction ...

Page 137: ...NK BOTTOM VIEW ISOMETRIC VIEW Machined groove for thermocouple wire routing Thermocouple junction bonded to component Heatsink base Thermal pad Through hole for thermocouple junction clearance may require removal of fin material Also use for alignment guidance during heatsink installation Machined groove for thermocouple wire routing ...

Page 138: ...y placing the thermocouple downstream of the component This method is conservative since it includes heating of the air by the component The following figure illustrates one method of mounting the thermocouple Figure C 4 Measuring Local Air Temperature Thermocouple junction PWB Tape thermocouple wire to top of component Air flow ...

Page 139: ...iterature To obtain the most up to date product information in PDF or HTML format visit http www motorola com computer literature Table D 1 Motorola ECC Documents Document Title Motorola Publication Number MVME5500 Single Board Computer Programmer s Reference Guide V5500A PG MVME761 Transition Module Installation and Use VME761A IH MVME712M Transition Module Installation and Use VME712MA IH MOTLoa...

Page 140: ...4 6430 or 303 675 2150 Web Site http e www motorola com webapp sps library prod_lib jsp E mail ldcformotorola hibbertco com MPC7450UM D Rev 2 MPC7450 RISC Microprocessor Hardware Specification Literature Distribution Center for Motorola Telephone 1 800 441 2447 FAX 602 994 6430 or 303 675 2150 Web Site http e www motorola com webapp sps library prod_lib jsp E mail ldcformotorola hibbertco com MPC7...

Page 141: ...32nd Parkway Aurora CO 80011 8141 Web Site http www intel com design litcentr index htm 290737 003 3 Volt Intel StrataFlash Memory 28F128J3A 28F640J3A 28F320J3A Intel Corporation Literature Center 19521 E 32nd Parkway Aurora CO 80011 8141 Web Site http www intel com design litcentr index htm 290667 005 PCI 6154 HB2 PCI to PCI Bridge Data Book PLX Technology Inc 870 Maude Avenue Sunnyvale Californi...

Page 142: ...t Bell Road Phoenix AZ 85022 Web Site http eu st com stonline index shtml M48T37V 2 Wire Serial CMOS EEPROM Atmel Corporation San Jose CA Web Site http www atmel com atmel support AT24C02 AT24C04 AT24C64 AT24C256 AT24C512 Universe II User Manual Tundra Semiconductor Corporation Web Site http www tundra com page cfm tree_id 100008 Universe II CA91C042 8091142_MD300_01 p df Table D 2 Manufacturers D...

Page 143: ...ations Document Title and Source Publication Number VITA http www vita com VME64 Specification ANSI VITA 1 1994 VME64 Extensions ANSI VITA 1 1 1997 2eSST Source Synchronous Transfer VITA 1 5 199x PCI Special Interest Group PCI SIG http www pcisig com Peripheral Component Interconnect PCI Local Bus Specification Revision 2 0 2 1 2 2 PCI Local Bus Specification IEEE http standards ieee org catalog I...

Page 144: ......

Page 145: ...nual xix CPU bus activity LED 2 1 CR CSR settings 3 16 D debug 4 12 default VME settings 3 12 delete 3 18 display 3 16 edit 3 17 restore 3 18 delete VME settings 3 18 dimensions A 2 display VME settings 3 16 documentation related D 1 E edit VME settings 3 17 environmental specifications A 2 ESD precautions 1 3 Ethernet interface 10 100Mb 4 8 Gigabit 4 8 evaluating thermal performance C 1 expansion...

Page 146: ... rules 3 6 command types 3 2 command versus test 3 2 described 3 1 how employed 3 1 interface 3 4 list of commands 3 7 memory requirements 3 1 prompt explained 3 4 test suites 3 3 tests described 3 2 MPC7455 processor 4 3 N NVRAM 4 10 O operating temperatures maximum C 1 P P1 connector B 5 PCI bus arbitration 4 9 PCI IDSEL signal 4 9 PCI local bus devices 4 8 PCI to PCI bridge 4 9 physical dimensi...

Page 147: ...rial interface devices 4 5 interrupt controller 4 5 memory controller interface 4 5 B 2 timers 4 6 system memory 4 7 T temperature measurement C 1 C 5 temperature range A 2 temperatures component C 1 thermal performance C 1 thermocouple mounting C 7 timer watchdog 4 10 typeface meaning of xix U Universe II controller 4 11 unpacking guidelines 1 2 V vibration A 2 Vio keying pin 1 16 VME settings 3 ...

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