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EMC Compliance

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which determine the actual volume and speed of air flowing over a
module.

EMC Compliance

The Motorola MVME167P family of VME single-board computers were
tested in a CE-marked EMC-compliant chassis and meet the requirements
for Class B equipment. Compliance was achieved under the following
conditions:

❏

Shielded cables on all external I/O ports.

❏

Cable shields connected to earth ground.

❏

Conductive chassis rails connected to earth ground.

❏

Front panel screws properly tightened.

For minimum RF emissions, it is essential that the conditions above be
implemented. Failure to do so could compromise the CE compliance of the
equipment containing the module.

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Summary of Contents for MVME167P

Page 1: ...MVME167P Single Board Computer Installation and Use V167PA IH2 December 2001 Edition ...

Page 2: ...e United States of America Motorola and the Motorola logo are registered trademarks of Motorola Inc MC68040 and MC68060 are trademarks of Motorola Inc All other products mentioned in this document are trademarks or registered trademarks of their respective holders ...

Page 3: ...the Equipment Operating personnel must not remove equipment covers Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment Service personnel should not replace components with power cable connected Under certain conditions dangerous voltages may exist even with the power ...

Page 4: ...losion if battery is replaced incorrectly Replace battery only with the same or equivalent type recommended by the equipment manufacturer Dispose of used batteries according to the manufacturer s instructions Attention Caution Il y a danger d explosion s il y a remplacement incorrect de la batterie Remplacer uniquement avec une batterie du même type ou d un type équivalent recommandé par le constr...

Page 5: ... efforts have been made to assure the accuracy of this document Motorola Inc assumes no liability resulting from any omissions in this document or from the use of the information obtained therein Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes Electronic v...

Page 6: ...d to in writing by Motorola Inc Use duplication or disclosure by the Government is subject to restrictions as set forth in subparagraph b 3 of the Rights in Technical Data clause at DFARS 252 227 7013 Nov 1995 and of the Rights in Noncommercial Computer Software and Documentation clause at DFARS 252 227 7014 Jun 1995 Motorola Inc Computer Group 2900 South Diablo Way Tempe Arizona 85282 ...

Page 7: ... 5 Switches and Jumpers 1 6 General Purpose Readable Jumpers J1 1 7 VME System Controller J6 1 7 SRAM Backup Power Source J9 1 8 Serial Port 4 Clock Configuration J10 and J11 1 9 Petra SDRAM Size S3 1 9 Board EPROM Flash Mode S4 1 11 Preparing the Transition Module 1 11 Installation Instructions 1 12 MVME167P and Transition Module Installation 1 12 System Considerations 1 14 CHAPTER 2 Startup and ...

Page 8: ...rements 3 2 Implementation 3 3 Using the Debugger 3 3 Debugger Commands 3 5 CHAPTER 4 Modifying the Environment Overview 4 1 CNFG Configure Board Information Block 4 2 ENV Set Environment 4 3 CHAPTER 5 Functional Description Introduction 5 1 Summary of Features 5 1 Processor and Memory 5 2 I O Implementation 5 3 ASICs 5 3 Block Diagram 5 4 Data Bus Structure 5 4 Microprocessor 5 4 Memory Options 5...

Page 9: ...ocal Bus Arbiter 5 12 Connectors 5 12 Remote Status and Control 5 13 CHAPTER 6 Connector Pin Assignments MVME167P Connectors 6 1 Remote Reset Connector 6 2 VMEbus Connectors 6 2 APPENDIX A Specifications Introduction A 1 Board Specifications A 1 Cooling Requirements A 2 EMC Compliance A 3 APPENDIX B Troubleshooting Solving Startup Problems B 1 APPENDIX C Network Controller Data Network Controller ...

Page 10: ...x IOT Command Parameters D 4 APPENDIX E Related Documentation MCG Documents E 1 Manufacturers Documents E 2 Related Specifications E 3 GLOSSARY ...

Page 11: ...xi Figure 1 1 MVME167P Board Layout 1 2 Figure 2 1 MVME167P Firmware System Startup 2 4 Figure 5 1 MVME167P Block Diagram 5 5 List of Figures ...

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Page 13: ... 3 2 Table 3 2 167Bug Commands 3 5 Table 4 1 MVME167P Configuration Settings 4 3 Table 5 1 Local Bus Arbitration Priority 5 12 Table 6 1 Remote Reset Connector J3 6 2 Table 6 2 VMEbus Connector P1 6 3 Table 6 3 VMEbus Connector P2 6 4 Table A 1 MVME167P Specifications A 1 Table B 1 Troubleshooting MVME167P Boards B 1 Table E 1 Motorola Computer Group Documents E 1 Table E 2 Manufacturers Documents...

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Page 15: ... the MVME167P the Petra chip replaces the MCECC ASIC As of the publication date the information presented in this manual applies to the following MVME167P models This manual is intended for anyone who designs OEM systems desires to add capability to an existing compatible system or works in a lab environment for experimental purposes A basic knowledge of computers and digital logic is assumed To u...

Page 16: ...he board firmware with a detailed description of the monitor interactive command portion of the firmware as well as information on using the debugger Date Changes December 2001 Entries on the functionality of jumper header J9 were added in the Preparing the Board section in Chapter 1 December 2001 A note on the functionality of jumper headers J2 and J7 was added to the section Switches and Jumpers...

Page 17: ...he event that you experience difficulty with your MVME167P single board computer Appendix C Network Controller Data A description of the VMEbus network controller modules that are supported by the 167Bug firmware Appendix D Disk Tape Controller Data A description of the VMEbus disk tape controller modules that are supported by the 167Bug firmware Appendix E Related Documentation A listing of other...

Page 18: ...ge significant denotes that the actions initiated by that signal occur on high to low transitions Data and address sizes for MVME167P chips are defined as follows A byte is eight bits numbered 0 through 7 with bit 0 being the most significant A half word is 16 bits numbered 0 through 15 with bit 0 being the most significant A word or single word is 32 bits numbered 0 through 31 with bit 0 being th...

Page 19: ...ents in screen displays and examples and to introduce new terms courier is used for system output for example screen displays reports examples and system prompts Enter Return or CR represents the carriage return or Enter key Ctrl represents the Control key Execute control characters by pressing the Ctrl key and the letter simultaneously for example Ctrl d ...

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Page 21: ...red To complete an MVME167P based system you need the following equipment VME system enclosure with power supply and system backplane Display console Operating system and or application software Disk drives and or other I O and controllers MVME712 series transition module connecting cables and P2 or LCP2 adapter Figure 1 1 illustrates the MVME167P Single Board Computer with its major components ...

Page 22: ...out RUN SCON FAIL STAT MVME LAN 12V SCSI VME 167P 36SE ABORT RESET S1 S2 DS2 DS4 DS3 DS1 A1 B1 C1 A32 B32 C32 J11 1 2 1 1 2 J1 6 5 J6 BT1 L2 A1 B1 C1 A32 B32 C32 P1 P2 J3 19 20 DS6 DS5 DS8 DS7 1 2 15 16 J2 2 9 10 1 3 1 L1 3 1 3 J10 1 2 J7 J4 J5 1 2 59 60 1 2 59 60 XU2 XU1 XU3 XU4 S4 O N 1 2 O N 1 2 3 4 2817 0800 J9 ...

Page 23: ...umpers or switches on the MVME712 series transition module as necessary Preparing the Transition Module on page 1 11 Install the board and transition module in a chassis MVME167P and Transition Module Installation on page 1 12 Connect a display terminal MVME167P and Transition Module Installation on page 1 12 Connect any other equipment you will be using Chapter 6 Connector Pin Assignments For mor...

Page 24: ...e MVME167P board Use ESD Wrist Strap ESD Motorola strongly recommends the use of an antistatic wrist strap and a conductive foam pad when you install or upgrade the board Electronic components can be extremely sensitive to ESD After removing the board from the chassis or from its protective wrapper place the board flat on a grounded static free surface component side up Do not slide the board over...

Page 25: ...ff before opening the enclosure can result in personal injury or damage to the equipment Hazardous voltage current and energy levels are present in the chassis Hazardous voltages may be present on power switch terminals even when the power switch is off Never operate the system with the cover removed Always replace the cover before powering up the system Preparing the Board To produce the desired ...

Page 26: ...s avoid touching areas of integrated circuitry static discharge can damage circuits Note Headers J2 and J7 are for factory use they are not available to customer applications J2 is used during board manufacture in programming on board logic devices J7 is a thermal sensing header It is not used on the MVME167P Table 1 2 MVME167P Configuration Settings Function Factory Default General Purpose Readab...

Page 27: ...as a 0 when the jumper is on The MVME167P is shipped from the factory with all jumpers installed as diagrammed below VME System Controller J6 The MVME167P can operate as VMEbus system controller The system controller function is enabled disabled by jumpers on header J6 When the MVME167P is system controller the SCON LED is turned on The VMEchip2 may be configured as a system controller as shown be...

Page 28: ...tandby voltage serves as primary and secondary power source the onboard battery is disconnected The backup power configurations available for onboard SRAM through header J9 are illustrated in the following diagram J9 2 1 6 5 Primary VMEbus 5V STBY Secondary VMEbus 5V STBY Factory Configuration J9 2 1 6 5 Primary Onboard Battery Secondary Onboard Battery J9 2 1 6 5 Primary VMEbus 5V STBY Secondary ...

Page 29: ...r receive TRXC4 and RTXC4 respectively The factory configuration has port 4 set to receive both signals Petra SDRAM Size S3 MVME167P boards use SDRAM Synchronous DRAM in place of DRAM For compatibility with user applications the MVME167P s SDRAM is configurable to emulate 4MB 8MB 16MB 32MB or 64MB ECC protected DRAM Board configuration is a function of switch settings and resistor population optio...

Page 30: ...he MVME167P Petra MCECC interface supports on board ECC DRAM emulations up to 64MB For sizes beyond 64MB the MVME167P accommodates memory mezzanines of the types used on previous MVME167 boards One additional mezzanine can be plugged in to provide up to 128MB of supplementary DRAM Table 1 3 Petra SDRAM Size Settings S3 Segment 1 S3 Segment 2 S3 Segment 3 MCECC DRAM Size ON ON ON 4MB ON ON OFF 8MB ...

Page 31: ...E167P Setting S4 segment 1 to ON initializes the board in MVME177P mode Preparing the Transition Module The MVME167P supports the MVME712B transition module which in conjunction with an LCP2 adapter board supplies SCSI and Ethernet connections It also supports the MVME712M transition module which in conjunction with a P2 adapter board supplies serial and parallel I O in addition to SCSI and Ethern...

Page 32: ... configured as appropriate proceed as follows to install the MVME167P board in a VME chassis 1 Attach an ESD strap to your wrist Attach the other end of the ESD strap to a suitable ground as described under Installation Preliminaries on page 1 4 The ESD strap must be secured to your wrist and to ground throughout the procedure 2 Turn all equipment power OFF and disconnect the power cable from the ...

Page 33: ... minimize RF emissions 7 Install the MVME712 series transition module in the front or the rear of the VME chassis To install an MVME712M which has a double wide front panel you may need to shift other modules in the chassis 8 On the chassis backplane remove the INTERRUPT ACKNOWLEDGE IACK and BUS GRANT BG jumpers from the header for the card slot occupied by the MVME167P Note Some VME backplanes e ...

Page 34: ...67P may not operate properly without its main board connected to VMEbus backplane connectors P1 and P2 Whether the MVME167P operates as a VMEbus master or VMEbus slave it is configured for 32 bits of address and 32 bits of data A32 D32 However it handles A16 or A24 devices in the address ranges indicated in the VMEchip2 chapter of the Programmer s Reference Guide D8 and or D16 devices in the syste...

Page 35: ...egister set in the VMEchip2 ASIC includes four bits that function as location monitors to allow one MVME167P processor to broadcast a signal to any other MVME167P processors All eight registers of the GCSR set are accessible from any local processor as well as from the VMEbus The MVME167P provides 12Vdc power to the Ethernet LAN transceiver interface through a 1A solid state fuse R24 located on th...

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Page 37: ...dicator Function Abort Switch ABORT Sends an interrupt signal to the processor The interrupt is normally used to abort program execution and return control to the debugger firmware located in the MVME167P EPROMs The interrupter connected to the Abort switch is an edge sensitive circuit filtered to remove switch bounce Reset Switch RESET Resets all onboard devices Also drives a SYSRESET signal if t...

Page 38: ...odule 4 The terminal is set up as follows Eight bits per character One stop bit per character RUN LED DS3 green CPU activity Indicates that one of the local bus masters is executing a local bus cycle SCON LED DS4 green System controller Lights when the VMEchip2 ASIC is functioning as VMEbus system controller LAN LED DS5 green LAN activity Lights when the LAN controller is functioning as local bus ...

Page 39: ...dware and firmware along with the rest of the system The EPROM resident firmware initializes the devices on the MVME167P board in preparation for booting the operating system The firmware is shipped from the factory with a set of defaults appropriate to the board In most cases there is no need to modify the firmware configuration before you boot the operating system For specifics in this regard re...

Page 40: ...ard on page 1 5 and verify that jumpers and switches are configured as necessary for your particular application Caution Caution Inserting or removing boards with power applied may damage board components 1 Jumper header J1 on the MVME167P contains eight segments which all affect the operation of the firmware They are read as a register at location FFF40088 in the VMEchip2 Local STARTUP INITIALIZA...

Page 41: ...andby voltage as the primary and secondary power source the onboard battery is disconnected Verify that this configuration is appropriate for your application 4 Headers J10 and J11 configure serial port 4 to drive or receive clock signals provided by the RTXC and TRXC signal lines The MVME167P factory configuration has port 4 set to receive both signals Refer to the instructions in Chapter 1 if yo...

Page 42: ...configure the port s by programming the MVME167P CD2401 Serial Communications Controller SCC or by using the 167Bug PF command 9 Power up the system 167Bug executes some self checks and displays the debugger prompt 167 Bug if the firmware is in Board mode However if the ENV command has placed 167Bug in System mode the system performs a self test and tries to autoboot Refer to the ENV and MENU comm...

Page 43: ...ugger to use local static RAM for its work page variables stack vector tables etc GPI1 3 4 When set to 1 high instructs the debugger to use the default setup operation parameters in ROM instead of the user setup operation parameters in NVRAM The effect is the same as pressing the RESET and ABORT switches simultaneously This feature can be helpful in the event the user setup is corrupted or does no...

Page 44: ...bort the Autoboot process if you wish Then the actual I O begins the program designated within the volume ID of the media specified is loaded into RAM and control passes to it If you want to gain control without Autoboot during this time however you can press the Break key or use the ABORT or RESET switches on the front panel The Autoboot process is controlled by parameters contained in the ENV co...

Page 45: ...e is given control if the routine meets the format requirements One use of ROMboot might be resetting the SYSFAIL line on an unintelligent controller module The NORB command disables the function For a user s ROMboot module to gain control through the ROMboot linkage four conditions must exist 1 Power has just been applied but the ENV command can change this to also respond to any reset 2 Your rou...

Page 46: ...ot in progress To abort hit BREAK After this message there is a delay to let you abort the Auto Boot process if you wish Then the actual I O is begun the program designated within the volume ID of the media specified is loaded into RAM and control passes to it If you want to gain control without Network Boot during this time however you can press the Break key or use the software ABORT or RESET sw...

Page 47: ...able By default 167Bug is in cold mode During cold resets a total system initialization takes place as if the MVME167P had just been powered up All static variables including disk device and controller parameters are restored to their default states The breakpoint table and offset registers are cleared The target registers are invalidated Input and output character queues are cleared Onboard devic...

Page 48: ...ayed on the screen Any breakpoints installed in your code are removed and the breakpoint table remains intact Control returns to the debugger Break Pressing and releasing the Break key on the terminal keyboard generates a power break Breaks do not produce interrupts The only time that breaks are recognized is while characters are being sent or received by the console port A break removes any break...

Page 49: ...ries SD The diagnostic prompt 167 Diag appears Refer to the Debugging Package for Motorola 68K CISC CPUs User s Manual for complete descriptions of the diagnostic routines available and instructions on how to invoke them Note that some diagnostics depend on restart defaults that are set up only in a particular restart mode The documentation for such diagnostics includes restart information ...

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Page 51: ...7Bug Diagnostics User s Manual listed in Appendix E Related Documentation 167Bug Overview The firmware for the M68000 based 68K series of board and system level products has a common genealogy deriving from the Bug firmware currently used on all Motorola M68000 based CPUs The M68000 firmware version implemented on the MVME167P MC68040 based single boare computer is known as MVME167Bug or 167Bug It...

Page 52: ...d a self test at power up feature which verifies the integrity of the board Various 167Bug routines that handle I O data conversion and string functions are available to user programs through the System Call handler Memory Requirements The program portion of 167Bug is approximately 512KB of code consisting of download debugger and diagnostic packages contained entirely in EPROM The 167Bug firmware...

Page 53: ...on 167Bug is written largely in the C programming language providing benefits of portability and maintainability Where necessary assembly language has been used in the form of separately compiled program modules containing only assembler code No mixed language modules are used Physically 167Bug is stored in two 27D4002 44 pin EPROMs installed in sockets XU1 and XU2 The executable code is checksumm...

Page 54: ...the System Call Handler routine RETURN described in Chapter 5 of the Debugging Package for Motorola 68K CISC CPUs User s Manual What you key in is stored in an internal buffer Execution begins only after you press the Return or Enter key A debugger command is made up of the following parts The command name either uppercase or lowercase e g MD or md A port number if the command is set up to work wi...

Page 55: ...e Line Assembler BC Block of Memory Compare BF Block of Memory Fill BH Bootstrap Operating System and Halt BI Block of Memory Initialize BM Block of Memory Move BO Bootstrap Operating System BR NOBR Breakpoint Insert Delete BS Block of Memory Search BV Block of Memory Verify CM NOCM Concurrent Mode No Concurrent Mode CNFG Configure Board Information Block CS Checksum DC Data Conversion decimal hex...

Page 56: ...Controller IRQM Interrupt Request Mask LO Load S Records from Host MA NOMA Macro Define Display Delete MAE Macro Edit MAL NOMAL Enable Disable Macro Listing MAW Save Macros MAR Load Macros MD Memory Display MENU Menu MM Modify memory MMD Memory Map Diagnostic MS Memory Set MW Memory Write NAB Network Automatic Boot Operating System NBH Network Boot Operating System and Halt NBO Network Boot Operat...

Page 57: ...boot Enable Disable RD Register Display user registers REMOTE Connect the Remote Modem to CSO RESET Cold Warm Reset RL Read Loop RM Register Modify user registers RS Register Set set user register s to specified value SD Switch Directories SET Set Time and Date SYM NOSYM Symbol Table Attach Detach SYMS Symbol Table Display Search T Trace TA Terminal Attach TC Trace on Change of Control Flow TIME D...

Page 58: ...ger commands by entering the Help HE command alone You can view the syntax for a particular command by entering HE and the command mnemonic TT Trace to Temporary Breakpoint VE Verify S Records Against Memory VER Revision Version Display WL Write Loop Table 3 2 167Bug Commands continued Command Description ...

Page 59: ...oard hardware ENV used to edit configurable 167Bug parameters in the MVME167P board s NVRAM The CNFG and ENV commands are both described in the Debugging Package for Motorola 68K CISC CPUs User s Manual listed in Appendix E Related Documentation Refer to that manual for general information about their use and capabilities The configuration parameters are stored in the MVME167P s Non Volatile RAM N...

Page 60: ...a strings are right justified The data strings are padded with zeros if the length is not met The Board Information Block is factory configured before shipment There is no need to modify block parameters unless the NVRAM is corrupted Refer to the MVME1X7P Single Board Computers Programmer s Reference Guide listed in Appendix E Related Documentation for the actual location and other information abo...

Page 61: ...th the MVME167P you may wish to use env d CR to restore the factory defaults as a troubleshooting aid see Appendix B Troubleshooting Table 4 1 MVME167P Configuration Settings ENV Parameter and Options Default Meaning of Default Bug or System environment B S B Bug mode Field Service Menu Enable Y N N Do not display field service menu Remote Start Method Switch G M B N B Use both methods Global Cont...

Page 62: ...ot The delay gives you the option of stopping the boot by use of the Break key The time span is 0 255 seconds Auto Boot Default String Y NULL String String You may specify a string filename to pass on to the code being booted Maximum length is 16 characters Default is the null string ROM Boot Enable Y N N ROMboot function is disabled ROM Boot at power up only Y N Y ROMboot is attempted at power up...

Page 63: ...ill delay before starting the boot The delay gives you the option of stopping the boot by use of the Break key The time span is 0 255 seconds Network Autoboot Configuration Parameters Pointer NVRAM 0000 0000 The address where the network interface configuration parameters are to be saved in NVRAM these are the parameters necessary to perform an unattended network boot Memory Search Starting Addres...

Page 64: ...mory Search Ending Address is the calculated size of local memory Memory Search Increment Size 0001 0000 Multi CPU feature used to offset the location of the Bug work page This must be a multiple of the debugger work page modulo 10000 64KB Typically Memory Search Increment Size is the product of CPU number and size of the Bug work page Example first CPU 0 0 x 10000 second CPU 10000 1 x 10000 etc M...

Page 65: ... Size Ending Address 0010 0000 Default Ending Address is the calculated size of local memory Memory Configuration Defaults The default configuration for Dynamic RAM mezzanine boards will position the mezzanine with the largest memory size to start at the address selected with the ENV parameter Base Address of Dynamic Memory The Base Address parameter defaults to 0 The smaller sized mezzanine will ...

Page 66: ...ess of the local resource that is accessible by the VMEbus Default is the base of local memory 0 Slave Ending Address 1 000F FFFF Ending address of the local resource that is accessible by the VMEbus Default is the end of calculated memory Slave Address Translation Address 1 0000 0000 This register allows the VMEbus address and the local address to differ The value in this register is the base add...

Page 67: ...g Address 1 0200 0000 Base address of the VMEbus resource that is accessible from the local bus Default is the end of calculated local memory unless memory is less than 16MB then this register is always set to 01000000 Master Ending Address 1 EFFF FFFF Ending address of the VMEbus resource that is accessible from the local bus Default is the end of calculated memory Master Control 1 0D Defines the...

Page 68: ...s of the VMEbus resource that is accessible from the local bus If enabled the default is 00FF FFFF otherwise 0000 0000 Master Control 3 00 Defines the access characteristics for the address space defined with this master address decoder If enabled the default is 3D otherwise 00 Master Enable 4 Y N N Do not set up and enable Master Address Decoder 4 Master Starting Address 4 0000 0000 Base address ...

Page 69: ... Page VMEbus A24 Enable Y N Y Yes Enable the F Page Address Decoder F Page VMEbus A24 Control 02 Defines the access characteristics for the address space defined with the F Page address decoder Default is 02 ROM Speed Bank A Code 04 Defines the ROM access time The default is 04 which sets an access time of five clock cycles of the local bus ROM Speed Bank B Code 04 Static RAM Speed Code 02 Defines...

Page 70: ...MEbus Global Time Out Code 01 Controls VMEbus timeout when the MVME167P is system controller Default 01 64 µs Local Bus Time Out Code 02 Controls local bus timeout Default 02 256 µs VMEbus Access Time Out Code 02 Controls the local bus to VMEbus access timeout Default 02 32 ms Table 4 1 MVME167P Configuration Settings continued ENV Parameter and Options Default Meaning of Default ...

Page 71: ...ers Programmer s Reference Guide listed in Appendix E Related Documentation Refer to that manual for a functional description of the MVME167P in greater depth Summary of Features The following table summarizes the features of the MVME167P Single Board Computer Feature Description Microprocessor 25MHz or 33MHz MC68040 processor Form factor 6U VMEbus Memory 16 32 64MB synchronous DRAM SDRAM configur...

Page 72: ...s Eight software interrupts including those in the VMEchip2 ASIC VME I O VMEbus P2 connector Serial I O Four EIA 232 D DTE configurable serial ports via VMEbus P2 connector and transition module Parallel I O Centronics compatible bidirectional parallel port via VMEbus P2 connector and transition module Ethernet I O Ethernet transceiver interface via DB15 connector on transition module SCSI I O SCS...

Page 73: ...ME712B and MVME712M transition boards It also accommodates older MVME712 series transition modules which provide configuration headers serial port drivers and industry standard connectors for various I O devices ASICs The following ASICs are used on the MVME167P VMEchip2 ASIC VMEbus interface Provides two tick timers a watchdog timer programmable map decoders for the master and slave interfaces an...

Page 74: ...cal bus is arbitrated by priority type the priority of the local bus masters from highest to lowest is 82596CA LAN CD2401 serial through the PCCchip2 53C710 SCSI VMEbus and MPU In the general case any master can access any slave not all combinations pass the common sense test however Refer to the MVME1X7P Single Board Computers Programmer s Reference Guide and to the user s guide for each device t...

Page 75: ...MVME167P boards 2816 0800 VMEchip2 VMEbus Interface EPROM 4 44 pin PLCC 53C710 SCSI Coprocessor CD2401 Quad Serial I O Controller Centronics Compatible Parallel I O 128KB SRAM Battery Option 4MB FLASH PETRA Mezzanine Connectors M48T58 Battery Backed 8KB RAM Clock PCCchip2 P2 Up to 128MB ECC DRAM 82596CA33 Ethernet Controller P1 Port 25 33MHz MC68040 MPU 16 64MB ECC SDRAM Memory Array ...

Page 76: ... 128KB SRAM static RAM SRAM architecture is single non interleaved SRAM performance is described in the section on the SRAM memory interface in the MVME1X7P Single Board Computers Programmer s Reference Guide Battery backup options are selected via jumper header J9 EPROM There are four 44 pin PLCC CLCC EPROM sockets for 27C102JK or 27C202JK type EPROMs They are organized as two 32 bit wide banks t...

Page 77: ...MVME1X7P Single Board Computers Programmer s Reference Guide and to the M48T58 data sheet for detailed programming guidance and battery life information VMEbus Interface and VMEchip2 The VMEchip2 ASIC provides the local bus to VMEbus interface the VMEbus to local bus interface and the DMA controller functions of the local VMEbus The VMEchip2 also provides the VMEbus system controller functions Ref...

Page 78: ... transition board is necessary to convert the I O connector pinout to industry standard connectors For drawings of the serial port interface connections refer to the MVME1X7P Single Board Computers Programmer s Reference Guide Note The MVME167P board hardware ties the DTR signal from the CD2401 to the pin labeled RTS at connector P2 Likewise RTS from the CD2401 is tied to DTR on P2 Therefore when ...

Page 79: ...hat of the MVME147 PCC In auto strobe mode after a write to the Printer Data Register the PCCchip2 automatically asserts the STROBE pin for a selected time specified by the Printer Fast Strobe control bit In manual mode the Printer Strobe control bit directly controls the state of the STROBE pin Refer to the MVME1X7P Single Board Computers Programmer s Reference Guide for drawings of the printer p...

Page 80: ...e provided by the PCCchip2 ASIC Refer to the 82596CA user s guide and to the MVME1X7P Single Board Computers Programmer s Reference Guide for detailed programming information SCSI Interface The MVME167P has provision for mass storage subsystems through the industry standard SCSI bus These subsystems may include hard and floppy disk drives streaming tape drives and other mass storage devices The SC...

Page 81: ...Echip2 and PCCchip2 descriptions in the Programmer s Reference Guide for detailed programming information Watchdog Timer A watchdog timer function is provided in the VMEchip2 ASIC When the watchdog timer is enabled it must be reset by software within the programmed interval or it times out The watchdog timer can be programmed to generate a SYSRESET signal a local reset signal or a board fail signa...

Page 82: ...s global timer Refer to the VMEchip2 description in the MVME1X7P Single Board Computers Programmer s Reference Guide for detailed programming information Local Bus Arbiter The local bus arbiter implements a fixed priority The order of priority is shown in Table 5 1 Connectors The MVME167P has two 96 position DIN connectors P1 and P2 P1 rows A B C and P2 row B provide the VMEbus interconnection P2 ...

Page 83: ...tem designers with flexibility in accessing critical indicator and reset functions When the board is enclosed in a chassis and the front panel is not visible this connector allows the Reset Abort and LED functions to be extended to the control panel of the system where they are visible Alternatively this allows a system designer to construct a RESET ABORT LED panel that can be located remotely fro...

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Page 85: ...ish pin assignments only For detailed descriptions of the interconnect signals consult the support information for the MVME167P board available through your Motorola sales office For the placement of the principal connectors on the MVME167P J1 and P1 P2 see Figure 1 1 Connector Location Table Remote Reset connector J3 Table 6 1 VMEbus connector P1 P1 Table 6 2 VMEbus connector P2 P2 Table 6 3 ...

Page 86: ...96 pin DIN type connectors P1 and P2 supply the interface between the base board and the VMEbus P1 provides power and VME signals for 24 bit addressing and 16 bit data Its pin assignments are set by the IEEE P1014 1987 VMEbus Specification P2 Row B supplies the base board with power with the upper eight VMEbus address lines and with an additional 16 VMEbus data lines P2 rows A and C are not used i...

Page 87: ...0 3 4 VD3 VBGIN0 VD11 4 5 VD4 VBGOUT0 VD12 5 6 VD5 VBGIN1 VD13 6 7 VD6 VBGOUT1 VD14 7 8 VD7 VBGIN2 VD15 8 9 GND VBGOUT2 GND 9 10 VSYSCLK VBGIN3 VSYSFAIL 10 11 GND VBGOUT3 VBERR 11 12 VDS1 VBR0 VSYSRESET 12 13 VDS0 VBR1 VLWORD 13 14 VWRITE VBR2 VAM5 14 15 GND VBR3 VA23 15 16 VDTACK VAM0 VA22 16 17 GND VAM1 VA21 17 18 VAS VAM2 VA20 18 19 GND VAM3 VA19 19 20 VIACK GND VA18 20 21 VIACKIN Not Used VA17...

Page 88: ...STDBY 12V 31 32 5V 5V 5V 32 Table 6 3 VMEbus Connector P2 Row A Row B Row C 1 SCSI_DB0 5V C 1 2 SCSI_DB1 GND C 2 3 SCSI_DB2 Not Used T 3 4 SCSI_DB3 VA24 T 4 5 SCSI_DB4 VA25 R 5 6 SCSI_DB5 VA26 R 6 7 SCSI_DB6 VA27 12VLAN 7 8 SCSI_DB7 VA28 PRSTB 8 9 SCSI_DBP VA29 PRD0 9 10 SCSI_ATN VA30 PRD1 10 11 SCSI_BSY VA31 PRD2 11 12 SCSI_ACK GND PRD3 12 13 SCSI_RST 5V PRD4 13 14 SCSI_MSG VD16 PRD5 14 Table 6 2...

Page 89: ... VD20 PRBSY 18 19 TXD3 VD21 PRPE 19 20 RXD3 VD22 PRSEL 20 21 RTS3 VD23 INPRIME 21 22 CTS3 GND PRFAULT 22 23 DTR3 VD24 TXD1 23 24 DCD3 VD25 RXD1 24 25 TXD4 VD26 RTS1 25 26 RXD4 VD27 CTS1 26 27 RTS4 VD28 TXD2 27 28 TRXC4 VD29 RXD2 28 29 CTS4 VD30 RTS2 29 30 DTR4 VD31 CTS2 30 31 DCD4 GND DTR2 31 32 RTXC4 5V DCD2 32 Table 6 3 VMEbus Connector P2 continued ...

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Page 91: ...l Description Table A 1 MVME167P Specifications Characteristics Specifications Power Requirements MC68040 processor at 25MHz or 33MHz 5Vdc 5 2 25A typical 2 5A maximum 12Vdc 5 1A maximum 12Vdc 5 100mA typical Environmental Parameters Temperature Operating 0 C to 55 C 32 130 F at exit point of forced air cooling Non operating 40 C to 85 C 40 143 F Altitude Operating 500 to 5 000 meters 1640 to 16 4...

Page 92: ...st encounters the module under test Test software is executed as the module is subjected to ambient temperature variations Case temperatures of critical high power density integrated circuits are monitored to ensure component vendors specifications are not exceeded While the exact amount of airflow required for cooling depends on the ambient air temperature and the type number and location of boar...

Page 93: ...hassis and meet the requirements for Class B equipment Compliance was achieved under the following conditions Shielded cables on all external I O ports Cable shields connected to earth ground Conductive chassis rails connected to earth ground Front panel screws properly tightened For minimum RF emissions it is essential that the conditions above be implemented Failure to do so could compromise the...

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Page 95: ...s not lit the board may not be getting correct power 1 Make sure the system is plugged in 2 Check that the board is securely installed in its backplane or chassis 3 Check that all necessary cables are connected to the board per this manual 4 Check for compliance with System Considerations as described in this manual 5 Review the Installation and Startup procedures as described in this manual They ...

Page 96: ...he keyboard type in CTRL Q III Debug prompt 167 Bug does not appear at powerup and the board does not autoboot A Debugger EPROM Flash may be missing 1 Disconnect all power from your system 2 Check that the proper debugger device is installed 3 Set J1 segment 5 to OFF remove the jumper This enables use of the secondary EPROM 4 Reconnect power 5 Restart the system by double button reset press the RE...

Page 97: ...t type in env d CR This restores the default parameters for the debugger environment 3 When prompted to Update Non Volatile RAM type in y CR 4 When prompted to Reset Local System type in y CR 5 After the clock speed is displayed immediately within five seconds press the Return key CR or Break to exit to the System Menu Then enter a 3 for Go to System Debugger and press the Return key 3 CR Now the ...

Page 98: ...are any errors go to step VI If there are no errors go to step V V The debugger is in system mode and the board autoboots or the board has passed self tests A No apparent problems troubleshooting is done No further troubleshooting steps are required VI The board has failed one or more of the tests listed above and cannot be corrected using the steps given A There may be some fault in the board har...

Page 99: ...mmands NBH NBO NIOP NIOC NIOT NPING and NAB they are also used with the debugger system calls NETRD NETWR NETFOPN NETFRD NETCFIG and NETCTRL Controller Type CLUN DLUN Address Interface Type MVME167 00 00 FFF4 6000 Ethernet MVME376 02 00 FFFF 1200 Ethernet MVME376 03 00 FFFF 1400 Ethernet MVME376 04 00 FFFF 1600 Ethernet MVME376 05 00 FFFF 5400 Ethernet MVME376 06 00 FFFF 5600 Ethernet MVME376 07 0...

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Page 101: ...tches Second Address and can be called up by Second CLUN Controller Type First CLUN First Address Second CLUN Second Address CISC Embedded Controller 00 Note 1 MVME320 Winchester Floppy Controller 11 Note 2 FFFF B000 12 Note 2 FFFF AC00 MVME323 ESDI Winchester Controller 08 FFFF A000 09 FFFF A200 MVME327A SCSI Controller 02 FFFF A600 03 FFFF A700 MVME328 SCSI Controller 06 FFFF 9000 07 FFFF 9800 M...

Page 102: ...323 ESDI Winchester Controller 4 Devices Controller LUN Address Device LUN Device Type 0 XXXX XXXX 00 SCSI Common Command Set CCS which may be any of these Fixed direct access Removable flexible direct access TEAC style CD ROM Sequential access 10 20 30 40 50 60 Controller LUN Address Device LUN Device Type 11 FFFF B000 0 Winchester hard drive 1 Winchester hard drive 12 FFFF AC00 2 5 1 4 DS DD 96 ...

Page 103: ...tyle CD ROM Sequential access 10 3 FFFF A700 20 30 40 50 60 80 Local floppy drive 81 Local floppy drive Controller LUN Address Device LUN Device Type 6 FFFF 9000 00 SCSI Common Command Set CCS which may be any of these Fixed direct access Removable flexible direct access TEAC style CD ROM Sequential access 08 7 FFFF 9800 10 18 16 FFFF 4800 20 28 17 FFFF 5800 30 40 Same as above but these will only...

Page 104: ...oppy Types and Formats DSDD5 PCXT8 PCXT9 PCXT9_3 PCAT PS2 SHD Sector Size 0 128 1 256 2 512 3 1024 4 2048 5 4096 1 2 2 2 2 2 2 Block Size 0 128 1 256 2 512 3 1024 4 2048 5 4096 1 1 1 1 1 1 1 Sectors Track 10 8 9 9 F 12 24 Number of Heads 2 2 2 2 2 2 2 Number of Cylinders 50 28 28 50 50 50 50 Precomp Cylinder 50 28 28 50 50 50 50 Reduced Write Current Cylinder 50 28 28 50 50 50 50 Step Rate Code 0 ...

Page 105: ... 0500 05A0 0B40 12C0 1680 2D00 Number of Bytes in Decimal 653312 327680 368460 737280 1228800 1474560 2949120 Media Size Density 5 25 DD 5 25 DD 5 25 DD 3 5 DD 5 25 HD 3 5 HD 3 5 ED Notes 1 All numerical parameters are in hexadecimal unless otherwise noted 2 The DSDD5 type floppy is the default setting for the debugger IOT Parameter Floppy Types and Formats DSDD5 PCXT8 PCXT9 PCXT9_3 PCAT PS2 SHD ...

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Page 107: ...visit http www motorola com computer literature Table E 1 Motorola Computer Group Documents Document Title Publication Number MVME1X7P Single Board Computers Programmer s Reference Guide V1X7PA PG MVME167Bug Debugging Package User s Manual MVME167BUG Debugging Package for Motorola 68K CISC CPUs User s Manual Parts 1 and 2 68KBUG1 D 68KBUG2 D Single Board Computers SCSI Software User s Manual SBCSC...

Page 108: ...ence Manual MC68040 Microprocessor User s Manual Literature Distribution Center for Motorola Telephone 1 800 441 2447 FAX 602 994 6430 or 303 675 2150 E mail ldcformotorola hibbertco com Web http www mot com M68000FR M68040UM 82596CA Local Area Network Coprocessor Data Sheet 82596CA Local Area Network Coprocessor User s Manual Intel Corporation Web http developer intel com design 290218 296853 SYM...

Page 109: ...homson Microelectronics Group Marketing Headquarters or nearest Sales Office 1000 East Bell Road Phoenix Arizona 85022 Web http www st com stonline books M48T58 Z85230 Serial Communications Controller Product Brief Zilog Inc 210 Hacienda Avenue Campbell CA 95008 6609 Web http http www zilog com products Z85230pb pdf Table E 2 Manufacturers Documents continued Document Title and Source Publication ...

Page 110: ...sion Electrotechnique Internationale 3 rue de Varembé Geneva Switzerland ANSI IEEE Standard 1014 1987 IEC 821 BUS ANSI Small Computer System Interface 2 SCSI 2 Draft Document X3 131 198X Revision 10c Interface Between Data Terminal Equipment and Data Circuit Terminating Equipment Employing Serial Binary Data Interchange EIA 232 D Global Engineering Documents Suite 400 1991 M Street NW Washington D...

Page 111: ... BBRAM Battery Backed up RAM BDM Background Debug Mode Big Endian Byte ordering method in memory whereby bytes are ordered 0 1 2 3 left to right with 0 being the most significant byte See also Little Endian BIST Built In Self Test COP Common On chip Processor test interface cPCI Compact PCI CPLD Complex Programmable Logic Device ...

Page 112: ...it CPM Communication Processor Module DMA Direct Memory Access DRAM Dynamic Random Access Memory ECC Error Checking and Correction EEPROM Electrically Erasable PROM EIA Electronic Industries Association EMI Electromagnetic Interference ESD Electrostatic Discharge FCC Fast Communications Controller HDLC High level Data Link Control ...

Page 113: ... I2 C Inter IC I O Input Output JTAG Joint Test Action Group Kb Kilobit 1024 bits KB Kilobyte 1024 bytes LAN Local Area Network LAPD Link Access Procedure D Little Endian Byte ordering method in memory whereby bytes are ordered 3 2 1 0 left to right with 3 being the most significant byte See also Big Endian Mb Megabit 1024 Kb ...

Page 114: ...024 KB Mbps Megabits per second MCC Multi Channel Controller MHz Megahertz msec Millisecond NVRAM Non Volatile RAM PCI Peripheral Component Interconnect PIM Peripheral Interface Module PLL Phase Lock Loop PMC PCI Mezzanine Card IEEE P1386 1 RAM Random Access Memory ROM Read Only Memory ...

Page 115: ...L 5 G L O S S A R Y RTC Real Time Clock SCC Serial Communication Controller SDRAM Synchronous DRAM SRAM Static RAM SS7 Signaling System 7 TDM Time Division Multiplexed VME VersaModule Eurocard VMEbus VPD Vital Product Data WAN Wide Area Network ...

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Page 117: ...us grant BG signal 1 13 byte defined xviii C cable connections 1 14 cable recommendations A 3 CD2401 serial communications controller SCC 2 6 CISC embedded controller s D 1 CLUN controller LUN D 1 commands debugger 3 5 comments sending xvii configuration switches S3 Petra SDRAM size 1 10 2 5 S4 EPROM Flash mode 1 11 2 5 configuring hardware 2 5 VMEbus interface 4 8 connector pin assignments 6 1 co...

Page 118: ...l control status registers GCSR 1 15 grounding strap 1 5 H half word defined xviii handshaking hardware 2 6 hardware features 5 1 initialization 2 4 I IACK interrupt acknowledge signal 1 13 initial conditions 2 3 installation considerations 1 15 transition modules 1 13 interconnect signals 6 1 interrupt acknowledge signal IACK 1 13 Interrupt Stack Pointer ISP 3 3 interrupts hardware 5 11 IOT comma...

Page 119: ...onitors 1 15 R related specifications E 3 remote control status connector J3 5 13 6 2 required equipment 1 1 RESET switch 5 13 resetting the system 2 11 B 2 RF emissions A 3 RF emissions minimizing 1 13 RTXC4 signal Receive Transmit Clock 4 1 9 S safety procedures 1 5 SCC serial communications controller 2 6 SCSI terminator configuration 5 10 terminator power 1 15 SD command 2 12 serial communicat...

Page 120: ...dules and serial I O 5 8 MVME712B 1 11 MVME712M 1 11 troubleshooting procedures B 1 TRXC4 signal Transmit Receive Clock 4 1 9 typeface meaning of xviii types of reset 2 11 U using the board 1 3 V VMEbus connectors 5 12 interface 5 7 signals 6 2 VMEchip2 ASIC 5 7 VMEchip2 LCSR Local Control and Status registers 1 7 2 5 X XON XOFF handshaking 2 6 word defined xvii ...

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