Motorola MVME167 Series, Installation Manual, Page: 49 / 176

Memory Maps
2-27
2
$FFFA0000 - $FFFBFFFF reserved -- 128KB 4
$FFFC0000 - $FFFCFFFF MK48T08 (BBRAM, TOD
Clock) D32-D8 64KB 1
$FFFD0000 - $FFFDFFFF reserved -- 64KB 4
$FFFE0000 - $FFFEFFFF reserved -- 64KB 2
Notes
1. For a complete description of the register bits, refer to the Single Board
Computers Programmer's Reference Guide or to the data sheet for the specific
chip.
2. On the MVME167 this area does not return an acknowledge signal. If the
local bus timer on the MVME167 is enabled, the access times out and is
terminated by a TEA signal.
3. Writes to the LCSR in the VMEchip2 must be 32 bits. LCSR writes of 8 or 16
bits terminate with a TEA signal. Writes to the GCSR may be 8, 16 or 32 bits.
Reads to the LCSR and GCSR may be 8, 16 or 32 bits.
4. This area does not return an acknowledge signal. If the local bus timer is
enabled, the access times out and is terminated by a TEA signal.
5. This area does return an acknowledge signal.
6. Size is approximate.
7. Port commands to the 82596CA must be written as two 16-bit writes: upper
word first and lower word second.
8. The CD2401 appears repeatedly from $FFF45200 to $FFF45FFF. If the local
bus timer is enabled, the access times out and is terminated by a TEA signal.
Table 2-6. Local I/O Devices Memory Map (Continued)
Address Range Devices Accessed Port Size Size Notes