Motorola MVME162LX 200 Series, Installation And Use Manual

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1-46 Computer Group Literature Center Web Site
Board Level Hardware Description
1
BBRAM, TOD Clock Memory Map
The MK48T08 BBRAM (also called Non-Volatile RAM or NVRAM) is
divided into six areas as shown in Table 1-14. The first five areas are
defined by software, while the sixth area, the time-of-day (TOD) clock, is
defined by the chip hardware. The first area is reserved for user data. The
second area is used by Motorola networking software. The third area is
used by the operating system. The fourth area is used by the MVME162LX
board debugger (162Bug). The fifth area, detailed in Table 1-15, is the
configuration area. The sixth area, the TOD clock, detailed in Table 1-16,
is defined by the chip hardware.
The data structure of the configuration bytes starts at $FFFC1EF8 and is
as follows.
struct brdi_cnfg {
char version[4];
char serial[12];
char id[16];
char pwa[16];
char speed[4];
char ethernet[6];
char fill[2];
char lscsiid[2];
char mem_pwb[8];
char mem_serial[8];
char port2_pwb[8];
char port2_serial[8];
char ipa_brdid[8];
char ipa_serial[8];
char ipa_pwb[8];
char ipb_brdid[8];
char ipb_serial[8];
char ipb_pwb[8];
char ipc_brdid[8];
char ipc_serial[8];
char ipc_pwb[8];
char ipd_brdid[8];
char ipd_serial[8];
char ipd_pwb[8];
char reserved[65];
char cksum[1]; }