MOTOROLA
Chapter 16. Memory Controller
16-53
Part IV. Hardware Interface
16.8.4.3 Special Signal for External Address Multiplexer Control
If external masters exist in the system with the MPC860, address multiplexing (for DRAM
for example) must be implemented in external logic. To control this external multiplexer,
special features have been added to GPL5. See Section 16.6.4.4, ÒGeneral-Purpose Signals
(GxTx, GOx).Ó
16.8.5 External Master Examples
The following sections provide external master examples.
16.8.5.1 External Masters and the GPCM
The following Þgures show examples of external mastersÕ interaction with the GPCM. Note
that synchronous and external masters behave differently. Synchronous external masters
behave like internal masters, except for an extra clock cycle at the beginning of the access
required for address decode. Asynchronous external masters behave as described in
Section 16.5.3, ÒExternal Asynchronous Master Support.Ó
Figure 16-47. Synchronous External Master Access
CLKOUT
A[6Ð27]
A[28Ð31]
R/W
BURST
TSIZ
TS
TA
CS
WE
OE
Data
Address
Match and
Compare
Memory
Device
Access
Summary of Contents for MPC860 PowerQUICC
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