Motorola MPC8240, User Manual, Page: 307 / 642

Chapter 6. MPC8240 Memory Interface 6-89
ROM/Flash Interface Operation
Figure 6-63. (Continued) PCI Reads from ROM/Port X 8-Bit (Part 4 of 4)
6.4.7 Port X Interface
The MPC8240’s memory interface is flexible enough to allow the system designer to
connect other non-memory devices to it. This functionality is typically called Port X. By
sharing the ROM/Flash interface capabilities with general purpose I/O devices it is possible
to configure a wide range of devices with the MPC8240. Note that the Port X interface
shares the MPC8240 ROM/Flash state machine and so the timing configurations used for
ROM/Flash also apply to Port X (that is, a system cannot set up different timings for
ROM/Flash and Port X). Figure 6-64 shows a block diagram of the Port X Peripheral
Interface.
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Mem Bus Clk
Mem Data
AR[19:0]
MIV
WE
RCS0 RCS1
PCI Clk
0
FRAME
A/D[31:0]
C/BE
[3:0]
IRD
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Y
ST
OP
AS
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Target
Disconnect
ADDR
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00
DW
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