16-10
Watchpoint Registers
Table 16-8 describes the modes selected by the WP_MODE field of the WP_CONTROL
register.
11–8
WP1_CNT[0–3]
0b0000
R/W
The watchpoint #1 counter field sets the initial value of the
countdown counter for watchpoint #1. This counter is used in all
watchpoint operation modes.
0000 16
0001 1
0010 2
...
1111 15
7–6
WP_TRIG[0–1]
0b00
R/W
The watchpoint trigger control field is used to select the driver
modes of the TRIG_OUT signal as follows:
0x TRIG_OUT is disabled; TRIG_OUT is in high-impedance
state.
10 TRIG_OUT is enabled as an active high output.
11 TRIG_OUT is enabled as an active low output.
5–4
WP_MODE[0–1]
0b00
R/W
The watchpoint mode field is used to define the operation modes
of the watchpoint facility. The supported functions are described
in Table 16-8.
3–2
—
0b00
R
Reserved
1
WP_CONT
0
R/W
The watchpoint continuous scan bit selects between continuous
scan mode and one-shot scan mode. In continuous mode, the
watchpoint facility continuously scans for trigger matches. Upon
each occurrence of a trigger match, the watchpoint facility issues
an output trigger (if programmed to do so) and begins a new scan
for the next trigger match. The watchpoint facility continues to
generate multiple output triggers until the watchpoint facility is
explicitly disabled by the user by writing WP_RUN =0.
In one-shot scan mode, the watchpoint facility scans for the first
trigger match. Upon the first occurrence of the trigger match, the
watchpoint facility issues an output trigger (if programmed to do
so and automatically disables the watchpoint facility by writing
WP_RUN = 0. Further trigger matches will not generate output
triggers until the watchpoint facility is re-enabled by the setting of
WP_RUN = 1 or the assertion of TRIG_IN.
0 One-shot scan mode
1 Continuous scan mode
0
WP_TRIG_HOLD
0
R/W
Trigger hold enable. When trigger hold mode is enabled, the
watchpoint facility enters a HOLD state upon a trigger match.
Additionally, the TRIG_OUT signal remains asserted while the
watchpoint facility remains in the HOLD state. The watchpoint
facility can be resumed from this HOLD state by pulsing
TRIG_IN. Pulsing the TRIG_IN signal while in the HOLD state
does not toggle the WP_RUN bit.
0 Trigger hold disabled
1 Trigger hold enabled
Table 16-7. Watchpoint Control Register Bit Field Definitions (Continued)
Bits
Name
Reset
Value
R/W
Description
Summary of Contents for MPC8240
Page 1: ...MPC8240UM D Rev 1 1 2001 MPC8240 Integrated Processor User s Manual ...
Page 38: ...xviii MPC8240 Integrated Processor User s Manual TABLES Table Number Title Page Number ...
Page 48: ...xlviii MPC8240 Integrated Processor User s Manual Acronyms and Abbreviations ...
Page 312: ...6 94 MPC8240 Integrated Processor User s Manual ROM Flash Interface Operation ...
Page 348: ...7 36 MPC8240 Integrated Processor User s Manual PCI Host and Agent Modes ...
Page 372: ...8 24 MPC8240 Integrated Processor User s Manual DMA Register Descriptions ...
Page 394: ...9 22 MPC8240 Integrated Processor User s Manual I2O Interface ...
Page 412: ...10 18 MPC8240 Integrated Processor User s Manual Programming Guidelines ...
Page 454: ...12 14 MPC8240 Integrated Processor User s Manual Internal Arbitration ...
Page 466: ...13 12 MPC8240 Integrated Processor User s Manual Exception Latencies ...
Page 516: ...16 14 Watchpoint Trigger Applications ...
Page 538: ...B 16 MPC8240 Integrated Processor User s Manual Setting the Endian Mode of Operation ...
Page 546: ...C 8 MPC8240 Integrated Processor User s Manual ...
Page 640: ...INDEX Index 16 MPC8240 Integrated Processor User s Manual ...