Motorola M68EML08EY, User Manual, Page: 31 / 36

Support Information
EM Board Socket Connectors P1 and P2
User’s Manual M68EML08EY Emulation Module - Version 1.0
MOTOROLA Support Information 29
Table 3-7 EM Connector P1 Signal Descriptions
Pin Mnemonic Signal
A1 — A16 LA[15] — LA[0]
(not in exact
order)
LATCHED ADDRESS BUS (lines 15—0) — Output lines for
addressing external devices.
A17, A18, A21, A22,
A24 — A30
NC No connection
A19 PFB_IRQ_B PFB INTERRUPT — Active-low signal that requests an interrupt of
the platform board.
A20 CHRGPMP CHARGE PUMP — 12-volt signal (from the platform board).
A23 PFB_OSC PFB OSCILLATOR — Oscillator clock signal from the platform
board.
A31 PFB_VCC PFB POWER — Operating voltage signal from the platform board.
A32 GND GROUND
B1 — B8 PFB_AD[7] —
PFB_AD[0]
PFB ADDRESS (lines 7—0) — Address of the current bus cycle.
B9 LIR_B LOAD INSTRUCTION REGISTER — Active-low signal that the
target MCU is fetching an instruction.
B10 LRW LATCHED READ/WRITE — Input signal from the target MCU. If
high, the target MCU is reading. If low, the target MCU is writing.
B11 SCLK SERIAL CLOCK — Output clock signal to the platform board.
B12 T12CLK T12 CLOCK — Matches the internal bus clock of the emulation
MCU.
B13 — B16, B18,
B20 — B23, B26 —
B30
NC No connection
B17 INTERNAL_B INTERNAL RESOURCE — Active-low input signal indicating (1)
that the current address is a target-MCU internal resource, or (2)
that the EM board recreated the current address.
B19 SWITCH_B SWITCH CONTROL — Active-low input signal that controls
switches into the foreground map.
B24 LBOX LAST BUS CYCLE — Input signal that the emulator asserts to
indicate that the target system MCU is in the last bus cycle of an
instruction.
B25 BREAK_B BREAK REQUEST — Active-low output signal that requests a
switch to background logic.
B31 PFB_VCC PFB POWER — Operating voltage signal from the platform board.
B32 GND GROUND
C1 — C32 GND GROUND