
MOTOROLA
Preface
ix
References
The following sources were referenced to produce this manual:
[1]
DSP56800 Family Manual
, DSP56800FM/D
[2]
DSP56F826/827 Digital Signal Processor User’s Manual
,
DSP56F826_827UM/D
[3]
DSP56F827 Technical Data
, DSP56F827/D
JTAG
Joint Test Action Group; a bus protocol/interface used for test and debug
LQFP
Low-profile Quad Flat Pack
MPIO
Multi-Purpose Input/Output Port; shares package pins with other
peripherals on the chip and can function as a GPIO
OnCE
TM
On-Chip Emulation, a debug bus and port created by Motorola to enable
designers to create a low-cost hardware interface for a professional
quality debug environment
PCB
Printed Circuit Board
PLL
Phase Locked Loop
RAM
Random Access Memory
ROM
Read-Only Memory
SCI
Serial Communications Interface Port
SPI
Serial Peripheral Interface Port
SRAM
Static Random Access Memory
SSI
Synchronous Serial Interface Port
WS
Wait State
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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