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Page 1: ...C I I r Y J Q i INSTRUCTION MANUAL J I MODEL MRC l MIeROPROCESSOR REMOTE CONTROL SYSTEM REMOTE TERMINAL MOSELEY ASSOCIATES INC Santa Barbara Research Park 111 Castilian Drive Goleta California 93017 Rev 9 June 1980 805 968 9621 ...

Page 2: ...n it has not been tested for compliance with the limits for Class A computing devices pursuant to Subpart J of Part 15 of FCC Rules which are designed to provide reasonable protection against such interference Operation of this equipment in a residential area is likely to cause interference in which case the user at his own expense will be required to take whatever measures may be required to corr...

Page 3: ...arge scale re mote control systems The many features incorporated into the MRC l are made possible through the use of a microprocessor as the main control and logic element _of each Remote and eontrol Terminal The flexibility of the microprocessor has also led to some changes in the terminology that is used to describe the functions per formed by the MRC l and the way it is connected as a system I...

Page 4: ...t of the system Should options be ordered at some future time the option data may be appended to this manual by the user 1 1 2 Technician Safety The compact and modular design of the MRC l with convenient access to all modules and wiring dictates that from a safety standpoint no lethal voltages be accidentally accessible to the technician With the exception of the AC mains which are made difficult...

Page 5: ... 32 LED s Calibrated analog values are digitally displayed one at a time A CHANNEL SELECT key is used to display the desired channel The Remote Terminals perform seven 7 basic functions MRC l 1 The remote keyboards are used to set up the system When the system is installed calibration data alarm criteria and so forth are entered at each Remote Terminal keyboard These may be changed from the remote...

Page 6: ...i TELEMETRY INPU i 000 1 _ _ I 000 000 ODD r I STATUS INPUTS OUTPUT COMMAN REMOTE I TELEMETR Y INPUTS I 000 If I STATUS I N PUTS l ODD 000 000 e OUTPUT COMMANDS REMOTE 2 I TELEMETRY INPUTS i 000 000 000 DOD STATUS INPUTS C OU T PUT COMMAN OS REMOTE N FIGURE I I TYPICAL M R C I SYSTEM INTERCONNECT MRC 1 1 4 ...

Page 7: ...arious Remote Terminals requesting display information and processing alarm reports as required The Control Terminal prepares messages to the various Remote Terminals according to the actions of the user Much of the power of the MRC l is due to the flexibility avail able to the user in setting up the system Specifically MRC l 1 Telemetry analog channels may be calibrated in three ways a Directly p...

Page 8: ...ising dge or falling edge or both 4 Any command output may be assigned to either the RAISE or LOWER key for any s Pecified channel Latching com mand lines also may be specified in which case push ing RAISE turns the command output ON and pushing LOWER turns it OFF 5 Telemetry inputs may be assigned Mute status inputs If the Mute status input is ON the telemetry data is dis played and limit checked...

Page 9: ...e Control Telemetry Output Alarm Indications Maintenance Override MRC l Microprocessor based Control and Remote Terminals One 1 Control Terminal active in a system at a time One 1 to nine 9 Remote Termi nals in a system Complies with current FCC require ments for AM FM and TV service Responds 45 seconds after failure of interconnecting circuit Internal timers and monitors for FCC TV compliance N C...

Page 10: ...nd level 0 dBm receive level 30 dBm minimum Nominal levels 1 sV p p at 2kQ Frequency range 26 kHz to 185 kHz Two tone FSK 1200 Hz idle 2200 Hz mark frequencies 1200 bits per second 10 bits 7 bit ASCII plus parity start stop bits Parity by character longitudinal redundancy check and fixed formats 16 32 48 or 64 lines per Remote Terminal Each line programmable by user for momentary or latching opera...

Page 11: ...m status change at Remote Terminal to Control Terminal indication 16 or 32 channels per Remote Ter minal Via keyboard at Remote Terminal in user selected units of measure Linear power to linear and in direct power calculation 4 digits with decimal point and polarity sign for value and limits display Fully tolerance alarmed for high and or low limits User assignable status channel to cause alarm mu...

Page 12: ...ample Interval Overall Measurement Accuracy 2 4 TTL STATUS INPUT MODULE 16 channels per module 2 modules maximum per Remote Terminal One part in 1024 Double ended 3 5 volts nominal lOOk DC bridging 5 0 volts Application of volt age above this level causes erratic operation of one or more channels Damage level is 40 volts A channel is sampled more than twice a second regardless of the number of cha...

Page 13: ...ically Isolated Status Input Module that can be interchanged with the TTL Status Module Both odule types may be mixed within a single Remote Terminal Number of Channels Input Configuration Voltage Reference Maximum Input Current Maximum Voltage 16 per module 2 modules maximum per Remote Terminal LED optical isolator Two terminal isolated from refer ence 30 rna maximum through optical isolator user...

Page 14: ... OPTICALLY ISOLATED COMMAND OUTPUT MODULE The Optically Isolated Command Output Module can be interchanged with the Open Collector Output Module for activating external devices Number of Outputs Output Configuration Voltage Reference Maximum Voltage Maximum Current Voltage Drop 250 rna MRC l Rev 9 June 1980 16 command output per module 4 modules maximum per Remote Terminal Optical isolator driving...

Page 15: ...ntrol Terminal are mounted horizontally component side up while those in a Remote Terminal or expanded Control Terminal are mounted vertically component side to the right The location of the components i e LED s test points and switches are always given as if the cards were mounted vertically The top edge of a card in a Standard Control Terminal is the left hand edge the bottom the right side Init...

Page 16: ...stallation of the equipment into the rack will allow removal of the power supply assembly for servicing without removing the entire chassis from the rack CAUTION tiHENEVER THE UNIT IS SHIPPED THE SHIPPING SCREW MUST BE INSTALLED AND SECURELY FAS TENED FAILURE TO OBSERVE THIS PRECAUTION CAN RESULT IN PHYSICAL DAMAGE TO THE UNIT AND VOIDS ALL WARRANTIES IF SHIPPED WITH OUT THE SCREW The shipping scr...

Page 17: ...2 Install the backup battery provided only with the Remote Terminal Connect the plus terminal of the battery to the red terminal of the CPU I O connec tor and the negative to the black terminal of the CPU I O connector Batteries are shipped discon nected to prevent complete discharging 3 Open the front panel by turning the knurled screw on the right side of the panel counterclockwise until the fas...

Page 18: ...minal is attempting to communicate with Remote Terminals 8 Depress the LAMP TEST k ey All LED s and displays on the Terminal should illuminate A second depression of the LAMP TEST key will restore all LED s and displays 9 This concludes initial checkout Note that after six seconds an alarm condition will be indicated at the Control Terminal by a flashing DATA F RRO LED because of the failure to co...

Page 19: ...the two wire mode one telephone pair carries both Remote and Control message transmissions In the four wire mode the Remote and Control Terminal messages are transmitted on separate telephone pairs giving slightly better noise immunity Figure 3 lA shows two wire interconnection techniques Figure 3 lB shows four wire interconnection CONTROL TERMINAL TELCO INTERFACE MRC l lAD BOARD FRON BOTTON OR 3 ...

Page 20: ...ted measure the output levels and modem input level and adjust if necessary as described in Sec tion 6 of this manual These levels should be checked again when the unit is installed at the final location Adjusting these controls taking into consideration actual telco line loss will greatly improve communications reliability B Subcarrier Interface When FM subcarriers are used for data in both direc...

Page 21: ...RRIER COMMUNICATIONS C Subcarrier Telco Interfaces DEMOD IN o o o o GEN OUT REMOTE TERMINAL When one communication direction is on telephone lines and the other direction is on an FM subcarrier a combination telephone subcarrier board is used at each end Interconnection is shown in Fig 3 3 MRC l 3 7 ...

Page 22: ...anual telemetry chan nels that have inputs may be calibrated Status channels with or without input connections may be programmed Exercising the MAP function the effect of commands to RAISE and LOWER may be observed In the event that any difficulty is encountered review thorough ly Sections 4 through 7 to determine the cause of the difficulty Refer especially to Section 8 for wireline modern or sub...

Page 23: ... 10 Nov 1980 MICROPROCESSOR REMOTE CONTROL MODEL MRC I REMOTE MI E E E u Cj SITE CHANNEL VALUE EDIT E GJ E1 r 1 r I AA MOSELEY ASSOCIATES INC 0 uP UM r E AOK 9 Low91oFf El 0 E1 t J EJ DDDDDBSBBB CHANNEL INDEX 13 17 21 25 29 14 18 22 26 O 15 19 23 27 31 16 20 24 29 32 FIGURE 4 1 ...

Page 24: ...ion where a brief summary of the key operation is given 4 1 1 Front P anel Controls and Indications Referring to an actual Remote Terminal or Figure 4 1 the front panel of the Remote Terminal contains the following A Numeric Displays 1 Site 1 digit 2 Channel 2 digits 3 Value Edit 4 digits sign B LED Displays 1 Status Indicators 32 LED s 2 Status Attribute Indicators 4 LED s 3 Alarm Indicators 3 LE...

Page 25: ...nd one to nine Remote Terminals each remote must be given a unique site number If two remote terminals have the same site number both will respond at once when the Control Terminal attempts to communicate with the duplicated site number and neither will be able to send back data successfully The site number is automatically assigned according to strapping on the front panel printed circuit board a...

Page 26: ...ffects the sign portion of the display At the end of a properly executed key sequence the user will see the re sults as described later in this section for each key sequence Any error in the key sequence results in an E appearing in the display for two seconds whereupon the display returns to whatever was being displayed just prior to the key sequence When not displaying key sequences the value ap...

Page 27: ...ails and D To indicate system and tolerance alarms The functions of each group of LED indicators is as follows A Status Indications There are 32 red LED s displaying the current value of status channels 1 32 LED s are assigned to channels starting from upper left and proceeding across from left to right Thus the first row displays status channels 1 8 the second row displays 9 16 the third row 17 2...

Page 28: ...command channels have been established as momentary in operation each LED is lit if the assigned command output is ON and not lit if the command output is OFF For example suppose channel 12 has been selected for display with command output 3 established as the raise output and command output 8 established as the lower output Then the RAISE ON LED will reflect the status of command output 3 and the...

Page 29: ...and flashing at 2 Hz if the alarm has not been acknowledged by pushing the ACK key This of course is only if limit checking has been enabled Additionally the LED labeled SYS describes the condition of the analog to digital conversion hardware Each Remote Terminal at approximately 4 second intervals makes internal tests of various conditions including the gain reference and offset voltages If any o...

Page 30: ...presence of the alarm 4 2 KEYBOARD INTRODUCTION The MRC l Remote Terminal front panel has 20 keys each with a function shift key is used to enable 11 additional functions Operations on the front panel keyboard are quite similar to opera tions on a calculator The following abbreviations appear on the Remote Terminal keyboard Abbreviation STAT CLR LIN INV HI LIM LO LIM l LIMS SHFT ACK MAINT O RIDE M...

Page 31: ...TRY KEYS The value entry keys are the numeric keys f1 9 the decimal point key and the minus sign key _ Some MRC l functions for example calibrating telemetry channels demand a value Entry of values is made possible by the numeric sign and point keys If a function requires a value the value is entered before the function key is pushed For example to calibrate a telemetry channel at lYJYJYJ in linea...

Page 32: ...ushed only the last four will be used The excess number keys are shifted off the left end of the value edit display and are lost as new keys are pushed For example 1 2 3 4 1 J J J LIN has the same effect as the example immediately preceding Note that the sign is preserved during the entry 4 4 SHIFT KEY The shift key at the lower right of the keypad chooses the set of functions engraved on the meta...

Page 33: ...e first push of the shift key selects the UPPER CASE power function and the second push rese lects the LOWER CASE linear calibrate function 4 5 FUNCTION KEYS Function keys are always the last keystroke in a key sequence the effect of the key sequence takes place immediately when a function key is pushed The various remote terminal functions that are per formed by each function key is defined below...

Page 34: ...erminal than the one set at the factory or programmed at the rear of the front panel For example entering 118 SITE II will make the remote terminal respond as Site 8 rather than its factory assigned site number The control terminal will then select this terminal when Site 8 is selected for display It should be stressed that each remote terminal should have a different site number If there are two ...

Page 35: ... external state of status Channel I is OFF and Channel I is assigned an invert attribute the LED corresponding to status Channel I will be lit The latch attribute causes a status channel to remain in the ON condition after a rising edge after inversion if applicable is detected Subsequent edges are disregarded The status clear function returns all latched channels to the OFF state until the next r...

Page 36: ...ejected with an E For example I INV does not invert status Channel I but rather results in E r being displayed for two seconds If Channell is to be inverted Channel l should first be selected using the CH key 4 5 4 LIN POWER Keys The LIN linear calibration and POWER functions are used to calibrate the selected telemetry channel Linear calibration implies that a change in the external vallle result...

Page 37: ... the convention of entering a negative initial value and choosing power calibration A negative number cannot be displayed in a power calibrated channel since no real number may be squared with the result a nega tive number INDIRECT METHOD calibration displays a result proportional to the values of the two preceding telemetry channels For example if we apply 3 volts to telemetry input 1 and 2 volts...

Page 38: ...ut 256 millivolts applied to the telemetry input This insures an acceptable level of accuracy Better normally much better than 5 An attempt to calibrate with an insuffi ciently large level results in E being displayed for 2 seconds 4 5 5 LOW LIM HI LIM Keys Each telemetry channel may be assigned an upper lmit and a lower limit If limit checking has been enabled and the telemetry channel as calibra...

Page 39: ... This means of course that it is impossible to enter a limit of exactly zero because the system interprets a limit of zero as no limit at all This can be circumvented by entering a limit very close to zero For example entering I SHFT HI LIM makes a number very close to zero the upper limit whereas entering SHFT HI LIM will make a HIGH LIMIT ALARM on the selected channel impossible and is equivalen...

Page 40: ...e select Channel l and enter 1 SHFT MAP RAISE MAP is the upper case of the key Then henceforth when ever we select Channel 10 and push RAISE command output line 1 will be activated for as long as the key is pushed Now suppose we enter 2 SHFT MAP LOWER Similarly whenever we select Channel 10 and push lower command output 2 will be activated Each channel may have two command outputs MAPPED to it in ...

Page 41: ...ng the RAISE key activates the command output to the on condition and pushing the LOWER key turns the command output off Latching channels are established by specifying the same command output as both RAISE and LOWER outputs For example if we select Channel 11 and enter 3 SHFT MAP RAISE followed immediately by 3 SHFT MAP LOWER then the command output 3 will be established as a latching command out...

Page 42: ... te voltage plate current and measured power output If these parameters were assigned to Channels 6 7 and 8 respectively and command output 4 connected to cause the power controller to increase with command output 5 causing a decrease then you can assign the command output 4 and 5 to each of the Channels 6 7 anm 8 To complete key sequence to accomplish this assignment is 6 H 4 SHIFT MAP RAISE 5 SH...

Page 43: ...tching and in version if specified limit checking resumes after a four second delay In this manner any telemetry channel may have any status input assigned to it as a mute channel A mute channel may be removed by entering instead of a valid status channel number i e entering SHFT MUTE will cause the selected channel to have its mute assignment re moved Mute assignments may be displayed by entering...

Page 44: ...mute function to have a transmitter fail and no alarm indication Because of the wide varity of transmitters in use it is not poss ible to give specific details The user must select his best method of incorporating this function 4 5 9 ACK Key The ACK acknowledge key is used to clear alarms At the remote terminal the following conditions cause alarms o A status channel with falling edge attribute ex...

Page 45: ...ple suppose Channel l is selected when telemetry Channel 3 falls below its lower limit First the audible alarm sounds if it has been enabled and the channel display starts flashing to indicate the presence of the alarm To examine the alarm push ACK Then the sonalert is switched off and the system selects Channel 3 We see the LOW ALARM LED flashing at 2 Hz indi cating that the alarm arose because C...

Page 46: ...seven segment dis plays on the front panel LAMP TEST is a push on push off function the first push begins the test the second push ends it 4 5 11 Maintenance Override The Maintenance Override function is used to establish local con trol of the Remote Terminal If the system is not in Maintenance OVerride mode raise and lower commands from the Remote Terminal are disabled Conversely if the system is...

Page 47: ...required TELEMETRY FAILSAFE A telemetry failsafe is also required if the Remote Terminal is un able to communicate with the Control Terminal for an one hour period At the MRC l Remote Terminal there is a single failsafe output which is activated for either or both types of failsafe II TELEMETRY failsafe will occur only if certain key sequences acti vating it have been entered These will be demonst...

Page 48: ...ces and should less than about 256 mV be observed at any of the four specified telemetry inputs the one hour countdown will begin Telemetry failsafe channels may be removed and displayed in a manner exactly analogous to muting limits or mapped commmand chan nels therefore SHFT 1 removes the first telemetry failsafe channel and ends failsafe monitoring Similarly SHFT 2 SHFT 3 SHFT 4 remove the othe...

Page 49: ...in hibited As described above putting the terminal into Main tenance OVerride status ends all failsafe conditions and re enables command outputs When Maintenance Override mode is ended all timers are reset so there is once again a 45 second wait until control failsafe and an one hour wait until telemetry failsafe regardless of past condi tions at the Remote Terminal In addition should all four tel...

Page 50: ... of calibration DISPLAY LOWER LIMIT REMOVE LOWER LIMIT ESTABLISH UPPER LIMIT Point position of limit need not match point position of calibration DISPLAY UPPER LIMIT REMOVE UPPER LIMIT ENABLE DISABLE LIMIT CHECKING ESTABLISH RAISE CHANNEL DISPLAY RAISE CHANNEL REMOVE RAISE CHANNEL ESTABLISH LOWER CHANNEL DISPLAY LOWER CHANNEL REMOVE LOWER CHANNEL MRC l REMOTE TERMINAL 4 28 SHFT LATCH SHFT SHFT STA...

Page 51: ...dible alarm B Second push ends flashing alarm indication C In the case of limit violations steadily on alarm indication will persist until analog value is back in bounds or mute status begins or limit checking is disabled BEGIN LAMP TEST END LAMP TEST BEGIN MAINTENANCE OVERRIDE A Ends any failsafe condition B Inhibits any RAISE LOWER commands from control end END MAINTENANCE OVERRIDE A Resets fail...

Page 52: ...ur Telemetry failsafe ends if all fo r telemetry failsafe channels fall to zero DISPLAY TM F ILSAFE CHANNEL N REMOVE TM FAILSAFE CHANNEL N MISCELLANEOUS Control failsafe takes place if a Remote Terminal receives no successful communi cations directed to it for 45 seconds Alarms are disabled for 1 seconds after reset CALIBRATION OVERFLOW DISPLAY AID SATURATION DISPLAY 6144 COUNTS MRC 1 REMOTE TERMI...

Page 53: ...ccessibility With the power supply shipping screw removed insert the terminal in the rack or cabinet and install 10 32 x 1 screws with fiber washers through the oval holes in the chassis flanges Torque screws firmly to provide a secure mounting Once installed in the rack all assemblies that normally require service can be re moved without removing the chassis from the rack The extender board is st...

Page 54: ...ph for lightning protection fuses 5 5 PM SUBCARRIER INTERCONNECT BNC connector J3 is the output of the Remote Terminal and is con nected to the equipment over which the subcarrier signal will be transmitted A BNC connector J2 is used for the subcarrier data being received from the Control Terminal Note that the components of the subcarrier interface module are frequency dependent Should your requi...

Page 55: ... 5 and 6 on the connector In this case the audible alarm will always be activated when an alarm condition is detected In the event that the Remote Terminal is located in a studio booth it is possible to have external control of the audible alarm so that it will be muted when a mike is active if those facilities are available in the studio Figure 5 1 indicates a typical arrangement of muting the al...

Page 56: ...was included for them Considering the susceptibility of any digital logic system to R F spikes it is our suggestion that all MRC l customers who use these connections for remote alarms or remote alarm enable switches in an R F environment should incorporate a small LC filter in order to isolate the MRC l from R F interference It will be easiest to do this by locating the inductors and capacitors n...

Page 57: ...eries are always shipped disconnected to prevent discharge during transit The positive battery terminal is connected to the red binding post terminal and the negative is connected to the black binding post The user may use other batteries in place of the one supplied In this case the maximum voltage that may be applied to the terminal posts is 7 0 volts The nominal design voltage is 6 0 volts with...

Page 58: ... n l o CPU INTERFACE CARD BATTERY o BATTERY HOLDER 1 4 POWER R ED POST FIGUR E 5 2 BATTERY INSTALLATION REMOTE TERMINAL MRC l RE1 10TE TERHINAL 5 6 CONNECTOR ...

Page 59: ...at early production units use a soldered diode matrix instead of the switches Refer to Figure 5 3 for location and connection chart Th switches are set as shown in the table below for the number of sites in the system SITE 1 2 3 4 5 6 7 8 9 MRC 1 REMOTE TERMINAL Rev 9 June 1980 1 OFF ON OFF ON OFF ON OFF ON OFF 5 7 SWITCH POSITIONS 2 3 4 OFF OFF OFF OFF OFF OFF ON OFF OFF ON OFF OFF OFF ON OFF OFF...

Page 60: ... Foil Side of Front Panel PCB Shown DIODES INSTALLED Diodes are IN270 or equivalent SAl SA2 SA3 None None None Diode None None None Diode None Diode Diode None None None Diode Diode None Diode None Diode Diode Diode Diode Diode None None None FIGURE 5 3 SITE IDENTIFICATION DIODES Early Production Units Only SA4 None None None None None None None None Diode MRC l Rm lOTE TERNINAL 5 8 ...

Page 61: ... relays should be used when it is desired to switch to greater loads or AC loads which must have a Series R lOO C l f network across them These relays may also be interfaced with transistor transistor logic TTL digital circuits The relay contacts should be wired so that one side is referenced to the digital common ground and the other relay contact to the digital input A pull up resistor may be ne...

Page 62: ...rminal from the Control Terminal hence you may save yourself a trip to the transmitter site by getting into the habit of removing the Remote Terminal from the Maintenance Override mode before you leave There is no way to exercise this function from the Con trol Terminal You may use a relay or TTL logic for indirect control of the lamp in which case the wiring illustrated for the fail safe output c...

Page 63: ...g and shielding tech niques should be followed throughout For those applications requiring control of high voltage or AC power a relay isolated command output option is available The connecti0n from the relay panel to a command output module through an interface card has been pre wired and only requires it be plugged in 5 3 INSTALLATION COMPLETION This completes installation of a Remote Terminal P...

Page 64: ...venience a set of tables Tables 5 1 5 2 and 5 3 are provided that allow the user to record the manner in which he has set up the Remote Terminal You may reproduce these forms as required for your purposes Each of the 32 telemetry channels is indicated on the left side of each table and when completed they will provide the user a guide for future reference as to how the Remote Terminal was set up M...

Page 65: ... INPUT INPm 1 1 20 2 2 21 3 3 22 4 4 23 5 5 24 6 6 25 7 7 26 8 8 27 9 9 28 10 10 29 11 11 30 12 12 31 13 13 32 14 14 33 1 1 15 34 16 16 35 17 1 20 18 2 21 1 q 3 22 20 4 23 2 5 24 22 6 25 21 7 26 24 8 27 2 1 9 28 2fl 10 29 27 11 30 28 12 31 29 13 32 30 14 33 3 15 34 32 16 35 TABLE 5 1 TELEMETRY ANALOG DATA TABLE Mnr l nDMO D I ERUT 1AL t 13 ...

Page 66: ...5 24 b CA Ptio_ X 6 I 7 1 1 f Ci _ 7 7h S F ovJ 8 77 g 1 HL 9 2R TU 10 q 11 Q I 11 10 1 L 12 11 13 l A X 13 1 4 PLOCU 14 11 T5 15 1Ll o 16 11 17 1 20 1B 2 21 3 22 zu 4 23 21 5 24 22 6 25 L3 7 26 L4 8 27 25 9 28 L6 10 29 77 11 30 zB 12 31 nf f NJ r 7 J 1 13 32 30 AiR 14 33 r D 00 r 15 34 3Z DODI X 16 35 TABLE 5 2 STATUS DATA TABLE MRC l REMOTE TERMINAL 5 14 ...

Page 67: ...OUTPUT FUNCTION PERFORMED 1 OUTPUT FUNCTION PERFORMED CHANNEL NUMBER OUT OUT NUMBER OUT OUT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Lv L I Lts L J jU j l jL TABLE 5 3 COMMAND OUTPUT TABLE MRC l REHOTE TERMINAL 5 15 ...

Page 68: ...rds i e CPU memory modern options etc plug into the mother board from the front The user s connection to a functional card occurs through an inter face card that plugs into the re r of the mother board The inter face card provides the physical connectors terminals or barrier strips to which the user makes his connection In some cases there can be several interface cards that can be associated with...

Page 69: ...FACE SLOT 8 9 I I TT L OR FILTERED OPTICAL INSUl ATED STATUS INPUT INTERFACE SLOT 1 2 13 1 4 I I OPEN COl l ECTOR OR FILTERED OPTICAL INSULATED INTERFACE COMMAND OUTPUT POWER SUPPLY 5 15 15 VOC BATTERY Al ARM FAIl SAFE MAINT _ j I 1 S I 1 C C I COMMUNICATIONS CIRCUIT S NALOG NPUTS 6 OR 32 TATUS NPUTS 6 OR 32 OMMAND UTPUTS 32 48 OR 64 AC MAINS 120 240 AC FIGURE a I REMOTE TERMINAL BLOCK DIAGRAM mC ...

Page 70: ...ception to this rule is the CPU card which must always be plugged into the first slot to obtain an AC power sample for the real time clock and power fail circuits Each printed circuit card edge connector has 100 pins The even pins contain the common bus signals The odd pins are used to communicate via interface cards to the external world through the rear panel To prevent confusion the even wire w...

Page 71: ...I PTION System cornmon signal ground Positive lSV supply Remote 1 5 amps capacity Control 8 amps capacity Negative l5V supply Remote 1 5 amps capacity Control 8 amps capacity 5 volt supply back up by an external battery Bidirectional 3 state data bus is used to transfer data between the microprocessor its peripher als and memory 16 pin address bus Both memory and input output devices are addressed...

Page 72: ...by state of this signal is READ Valid Memory Address This output from the CPU card indicates to peripheral devices that there is a valid address on the bus Input Output Preselect This line is high when the input output de vice address space is accessed Real Time Clock A 50 or 60 Hz signal derived from the AC power line and used as a timing signal Direct Memory Access When this signal goes low the ...

Page 73: ...te of ACIA s Asyn chronous Communications Inter face Adapters Data rates of 1200 or 300 baud are possible using this clock Lowest Priority Active low prioritized interrupts When one of these lines goes to a low state the microprocessor suspends its normal operation and begins servicing an interrupt routine A higher priority rou tine takes precedence over a lower priority Highest Priority Non Maska...

Page 74: ...he software determines the number and type of modules that are in the Remote Terminal This allows the user to add additional modules within the design capabilities at any time Power must be turned off and the batt ery disconnected before removing or inserting printed circuit cards When power is restored the software takes inventory of what is currently available and adjusts its internal record kee...

Page 75: ...elemetry analog data is acquired in a cyclic sequence from the analog to digital A D converters When an A D completes one conversion the input number is incremented and the next conver sion started while the previous conversion is applied through a digital filter and then limit checked Note that limit checks occur on each conversion as each new sample is acquired If there are two analog cards in t...

Page 76: ...tion If operational it activates the RAISE or LOWER LED During communications with the Control Terminal extensive error checking is performed to ensure receipt of valid data The Remote Terminal must receive one valid message within 45 seconds of the previous valid message in order to maintain the fail safe output active If the time period is exceeded the fail safe output is de activated MRC l REMO...

Page 77: ...E OR MODULES 7 2 HANDLING CMOS DEVICES The MRC l contains several CMOS devices such as 6802 MPU 6821 PIA 6850 ACIA and 2716 EPROMS which unfortunately can be damaged by severe electrical transient voltages A person walking over a waxed floor depending upon floor conditions and humidity can generate voltage potential in excess of 15kV The following is recommended to reduce damage to the CMOS device...

Page 78: ...ing probes on the circuits 7 3 CARD ADDRESS AND OPTION SWITCHES Most card assemblies contain small switches referred to as DIP switches that select the address of the card and in some cases provide various common options on the card Each switch is ex plained in Section 8 of this manual for the specific module Since each card except the CPU card can be placed in any card slot 2 through 15 on the mo...

Page 79: ...r to the switch itself DEVICE CHANNEL BCD SWITCH DIP SWITCH POSITIONS NUMBER ASSOCIATION POSITION 1 2 3 4 1 1 16 a i i i 2 17 32 1 t i i 3 33 48 2 i t i i 4 49 64 3 t t i i For troubleshooting purposes you may interchange cards of the same type BUT be sure to set the switches to the proper set ting before inserting the card 7 4 FAULT ISOLATION LEVEL 1 The MRC l contains several indications to aid ...

Page 80: ... a voltage that varies in step with the LED If there is no voltage check the fuses in the interface card If data is getting out onto the communications circuit from the Control Terminal de ermine if the Remote Terminal is receiving data The bottom LED on the Remote modem should flash in step with the transmit LED of the Control Terminal When the Remote Terminal transmits its transmit LED will illu...

Page 81: ... Also with the analog signals a minimum voltage of O 256V must be present across the two inputs in order to calibrate a telemetry channel Because of the very heavy filtering that is done on all the lines that pass through the interface cards do not expect the system to respond to very short duration pulses The problem of keep ing stray RF energy out of the Remote Terminal places a number of constr...

Page 82: ...ome boards early production units may contain DM81LS97 integrated circuits in place of the SN74LS244 I C s shown in the prints and mentioned in the descriptions Similarly early pro duction units may contain DM81LS98 circuits in place of SN74LS240 These changes were made due to considerations of parts availabi lity not due to problems with the older parts Figure 8 1 shows pin outs for the older and...

Page 83: ...roduction units 19 DMBILS97 on some older production units 1 9 Figure 8 1 SN74LS240 is the same as SN74LS244 except for inversion of the outputs Similarly DMBILS9B is an inverting version of DMBILS97 MRC l 8 2 9 June 1980 ...

Page 84: ... II THEORY OF OPERATION A Overall The front panel can be looked upon as a X Y matrix the X direction being data and the Y direction being a location The X path consists of six bits while the Y path is five bits describing 32 25 locations 21 of which are used Location bits BO B4 are decoded using a 4 to l6 bit decoder U22 to provide locations 1 through 16 and a 3 to 8 bit decoder U23 to provide loc...

Page 85: ... the inputs of U17 U17 is used to buffer the relatively low drive capabili ties of the signals from the CPU board Bits AO through A3 are applied to the A B C and D inputs of the TIL 308 displays The resultant displays are shown in Fig 1 Bit A4 is used to control the left hand decimal point C User Status Data for the user status appears on AO AS and is clocked into hex D latches Ul through U6 This ...

Page 86: ... will normally be low indicating that no push buttons are activated A push button activation will cause the appropriate location line to be connected to a data line causing the data bit to go high III TIMING DIAGRA11S BO B NOT VALID X VALID CB2 F 0 1 ENI EN8 _______________________ l AO A SAMPLED EN 9 EN 16 _______________ r AO A 1 SAM PLED REMOTE TERMINAL FRONT PANEL 20C2703 Rev 9 June 1980 3 ...

Page 87: ...ed by a defective Ul U17 or U2l or a failure on the CPU board Remove U17 from its socket All LED s should be OFF and the BCD displays should read F If they do not this indicates either a short to ground or a defective input on Ul U16 Remove Ul U16 one at a time leaving only one out at a time until the dis plays read correctly If doing this for all of Ul U16 does not solve the problem check with an...

Page 88: ...pparently dead ke board The easiest way to check for this is to remove power from the unit and check across each key switch with an ohmmeter look ing for a shorted switch REMOTE TEru INAL FRONT PANEL 20C2703 24 Aug 1979 5 ...

Page 89: ... I LZlLJl6 1 O l I l lIH D r IX IIIl leu 3N f d Ulmu 1 C NIYil lll 3 01 31 j U VlN3H S ...

Page 90: ...I U i 7 1 I dc o t EtV eN EAl8 IV9 Q 2 c uIO tVlI f vl e t L A 13 LENI QlLflVl o fI l6ILENI6 1 _ 1 2 1 I I R53 e2 OK 1 07 3 J Z IZ f I SL s f ER ISF Pe 70 Sit RE75 5TCR ALi ES AR IN CHMS k W 10 f 2 Pc BCARe 51C6B 42 3 COMR V VT YOUr EOC2703 4 C CR32 CR 3S C i TO AR RaJ C 37 CR41 CR43 ARE AM8 R CR33 CR36 ARC C F EN C I U23 4 0 t1 ci2A VX 6 LSl38 j Il A CJt CR It IN2 70 5 I w I I 1 SA 8 I I I 0 i 52...

Page 91: ... 04 cEf J 12 24 74l _ I AAlI STlr08E eNk v CJ 74174 15 5 1132 330 CA4f T ST U I 5 ss1A iJI Ujol J I S7iA S8 TeST ANI JI S7 il OIiIG ml_l llaCll 1 1 1 2 1 1 14 _ ltlit j2 3 1TTi SY5TEM STATUS 01 2NI 92 IK Q7 R44 SOM 1 ERT V 1 5 4 ALARM DRIVE NT ALARM 2 6 fl1lSf r rK 111 J 1 i i oc A NIC It c t t VA 1 0 9 Glsm c t G Q i l l v I SCHEMATIC I I e I J II 2 i r q 1F I f AfUcm T AMlHAl 1I01lT PAHfl 70 0dO...

Page 92: ... lSl DII cf I 11 tMD III cQ IlHe Q IUO I II I II tlll D fIIn IMO l f SNNI74 Iff S1I7417 I p SN7 17 I copSN74 74 I Ot O 00 C I l e U7CJ1t f U6 o U8 l o 0 flU 0 Zl U u V 11 1 _ U II U 111 11 U lot 1 11Jg IOO fttO llm I D Ilm IHO IS ID O D iD D iijj c o OAA tr l IIlQ R C 4 MfCfII O rrm Q Uh t GK o cw c fIIO C m MD U fIl I U uJI U lIm U GID U nm U f113D III ue fII 1t 111 40 NOTES L UNLESS OTHERWISE SP...

Page 93: ...ise until CR4 reset illuminates Then turn clockwise until the LED goes off Continue turning R30 for one more full turn 81 is used to generate a PF and used mainly for troubleshooting to ground is used to disable the RESET signal and is A jumper from U9 pin 1 internal RAM on the CPU and is normally installed A jumper between Pl 10 and Ul pin 35 is used to supply power to the internal RAM on the CPU...

Page 94: ...s a valid address on it No data transfers occur unless this line is high Output line E Enable is a 1 MHz square used for bus timing Data transfers occur when this line is high BA Bus Available signals that the CPU has gone inactive as a result of a request generated by an external device such as DMA Direct Memory Access The PIC is used to sequence interrupts to the CPU by allowing higher priority ...

Page 95: ...ontrolled by VMA from the CPU In this way the address lines to the rest of the system are only active when valid addresses are available VMA is also gated with the DMA input byDlOA This allows a DMA con troller to simulate VMA to the rest of the system by pulling DMA low Data lines 00 03 are buffered by U7 likewise 04 07 are buffered by US DIOB and UIOC are used to enable U7 and U8 One input of UI...

Page 96: ...es are decoded by U3 and used to modify its Zl Z4 outputs in accordance with which interrupt is active allowing a modified address to reach U4 In this manner there are eight 8 interrupt service addresses in stead of one 1 C I O Preselect I O is assigned addresses 8000 through 8lFF in this system Ra ther than decode all 16 address lines on each I O board an I O preselect system is used Address line...

Page 97: ...connected to PRE which will go active with addresses 8000 SIFF Address lines A6 A7 and AS are NORled together at U16e and fed to the first active high input Address line A2 is applied to the second active high input to U2 providing the 04 offset to the base address of 8000 Lines CAl and CA2 are used as inter rupt inputs and allow interrupts every 16 7 ms for 60 Hz or 20 ms for 50 HZ and also for l...

Page 98: ...and is used to simulate a power down power up sequence This switch is mainly used for trouble hooting CR4 indicates activity of the reset line and is used to adjust the power fail threshold potentiometer R30 CRl CR3 are provided to give a visual indication of operation of the 15 15 and 5V power sources CPU BOARD 9107132 Rev 9 June 1980 6 ...

Page 99: ... Vg 6L61 onv vZ ZE1LG16 QHVOa nd 1 1 O r I I I L Hid In j O I w ______ ______ 2 __ _ Hid zin lUi J SI ZH 09 YO l I OZ ZH 0 YO lll i j 0 t Hid In S VIG NIWI AI ...

Page 100: ...hould E be low If no jumper is present verify pin 36 of IC Ul is high Verify the following levels on IC Ul MC6802 HALT Pin 2 5 volts 25V NMI Pin 6 5 volts 25V BA Pin 7 o volts 25V RESET Pin 40 5 volts 25V F Check IC Ul pin 4 for real time clock interrupt signal 60 Hz pulse If this signal is absent check IC U2 pin 40 for the real time clock signal from the CPU inter face card G Check for activity o...

Page 101: ...eset push button two low going pulses should be seen If pulses are not present check IC U19 C Check data and address lines for activity D Observe pin 23 of IC U3 It should be normally high with low going pulses approximately every 20 ms If these pul ses are not present check IC U3 pin 11 for these pulses 3 I O Preselect A Check the inputs of IC U16A and IC U16B for activity coin cidental with acti...

Page 102: ...ignal is not present trace back to the origin IC Ul pin 37 B Check each pin of IC U13 and IC U14 which is pulled high by R7 to verify a HIGH very near 5 volts C Pin 15 of IC U14 should have a 1 s pulse every 13 sec IC U13 pin 13 should have a 52 sec square wave CPU BOARD 9107132 24 Aug 1979 9 ...

Page 103: ... OOTlnrn 3NOto rnwu eLhON 01 0 i JI rJjQ ul r fIr f t r r xr IV i 0 1 J H i il Z o a V JIlT n d l I lll Vj 0 l r JG IA f ON l 1N3HJS f o r S t C Co W NlOm mOD t v jc g lIu 1 J I D i c o Jl 5 c_ 1II1n1lll n l n YJIIIR 5 J JI Jii liZ II ONI lIa aw a f i ...

Page 104: ...II j It 1 1 ft r I r 4 I r o I H I j H j J io I I It L L _ _4 _ I II 4 4 _4 r_ _ 1 un r o t 1r 1r_ I r_ II ft J t 1r 4_ _ I 4 4r t lItI I I I I Sf 1 1 l I Clf I I I o 1 r r t 1 r t 1 I I I Y _ _4_ _ _ _4_ _ _r_ 4_ I l Y I J I j I I I r I I r I r I I I r 4 r I I I I I I I II 0 1 Ie I i r t 1 1 41 I 4 1 4 1I 1 r 4 o n I l J or J J I to I t yo J __ I r Tr __ t n 6 1 1 01 1 I __ o n UtI o II I I I n I...

Page 105: ... 1 lal 8 1 i lo n 0 0 I T 1 1 4_ Hr_ in t l o nal I I A II In oot L L 1 1 t t I r _ _1 t_ _ _ _ 1_ A It l r A _ _ _ _1 h x 1 r f r r tl J ol n 4_4_ _r_r _r_ r_r l ttt L_J _ _ _r _r_r t 1 _i 1 1 r S If U I I I 0 I 1 lJ1 1 1 _ _1 c r L l 1 A Y 1s r I b U Itl 1 I 00 t_ _ _t t_ il 1 1 I n U 01 0 l I f L_J I n If t_ _ _ _ _I_1 t_ 1 h 1 t t 1 rc l 0 j t 1 t I I 1 1 hr t 1 t t 1r r _ _ _ _ _ I 1 t_ L I I...

Page 106: ...OET IL ALiO SEE NOTE WUl NOTE 5 OTM4E WISE 5PIl c e O UN S e 5 lsTOR c a PA CI O v LUII S V LUII Ii ItIt 0 I O e IN I IAIC OF ADS c Q O 51 C 5a l II 21 SC t M T C 071 52 REV Otf LL TR N5 15TDR S OLO R D WITH OuT 5DCf TS ALL 1 e A AR OU TED IN SOCKeT TACH ll OL DC R y I TO P D a PLC S I e S HO N FOR R EN C ONLY TO e s p e c rrIEO A 0 IN TAL I D AT ANOTt tIll f AS jLN IiI LY L V L A LL JUIV PE AS Af...

Page 107: ... 2 C 10 Y5 r L A 00 NNCC TC SWITC I 812 JA EwEC Pl Cl f i O c aoARQ OESt P T 10N U 2 U3 U5 S UII U um U3 u a U 2 UII UI3 1 UI U l7 16 UIS UGt UIO 0 3D 3 Jll 1 1JIlt 5 to II zs Z t C l q c 2 Z2 t 20 IOAIOIo t YI J2 051 SJCS8 9 Il 2J I n o lI 32 500 9 1 a 2 5001 aSOOS7 2 S003a 2 SD02 3 50 I 32 lb5012 I rOQ 3S D iaQ87S 3 b08 7 3 OD82 b bD735 3bb072 7 bb0719 b Oh l 3b DIa Q IOI5D 1b 30075 4410b 03 441...

Page 108: ...SPECIFICATIONS 1 The maximum battery charging current is 75 mAo This is suitable for up to 7 5 AH Gel Cell batteries For a larger battery use an external charger 2 For a battery voltage of 6 V it is float charged at 6 75 volts The battery is considered discharged when the battery voltage under load drops below 5 0 volts The maximum voltage applied to the battery terminals should not exceed 7 0 vol...

Page 109: ...ins Pl ll and Pl 13 The AC is full wave rectified with CRI and CR2 then filtered using Cl A potentiometer is connected to Pl 91 and ground on the CPU board Rl R2 and the potentiometer form an adjustable attenuator that is used to compensate for variances in local line voltage and frequency UlA along with R4 form a comparator with hysteresis The threshold is maintained constant with CR3 a 3 1 V Zen...

Page 110: ...ified by CR5 This is applied through voltage divider R15 R16 to the positive input of a voltage comparator UIC On the output of the comparator is a rectangular wave having a duty cycle of about 55 4 Battery Backup Switching and Charging Fifteen volts from the power supply is regulated down to 7 45 volts by U2 This is passed through CRIO to the bat tery terminal R28 is adjusted such that 6 75 V is ...

Page 111: ...ower C6 filters out any glitches that might alter the state of UID If the output of UID did go low this will tell the computer that the battery failed during the power outage To reset the latch a pulse of at least 10 ms is applied by the CPU to Pl 71 This causes Q2 to conduct removing the reference voltage to the comparator The voltage divider of R22 and R25 is used to provide at least 0 4 V at th...

Page 112: ... an MRC l Control Terminal these relays are never activated and serve no function The relays are installed however to preserve interchange ability with boards installed in remote terminals These relays are capable of switching a load of up to 24 VDC at currents of up to 1 ampere Inductive loads relay coils etc should have a clamping diode wired across them to inhibit negative voltage spikes Extern...

Page 113: ... board Each pulse reaching pin I of U3 retriggers the first stage of U3 for another 500 msec The output at pin 13 will remain high as long as pulses at pin 1 arrive at least every 500 msec Should these pulses cease because for any of a number of reasons the program has ceased running properly the output at pin 13 falls to ground The falling edge at pin 9 causes a l msec pulse at pin 5 If the jumpe...

Page 114: ...r marked Continuous Restart enables continu ous retries should the first attempt to restart be un successful This feature does not appear on some early production units CPU INTERFACE 91C72l5 Rev 8 October 1980 7 ...

Page 115: ...usting the trim potentiometer on the CPU board R30 If this does not correct it check for shorts or replace Ul e If PF is normal but RESET is still low check for at least 4 5 V at pin 6 of Ul and 2 5 to 3 5 V at pin 7 If these are normal pin 1 of Ul should be less than 0 5 V If not suspect Ul If so the collector of Ql Pl 59 should be near 5 V If not check U3 pin 5 which should be near ground If not...

Page 116: ...omentarily grounding pin 8 If pin 14 is still low suspect CR6 C6 or U1 c If voltage at the red battery terminal is not 6 75 V O l V with the battery disconnected check the voltage on R29 If should be approximately 7 45 V If not suspect U2 or R28 CPU INTERFACE 91C7215 Rev 10 October 1980 9 ...

Page 117: ...UES AP E IIJ MICROFAfUIDS BOARD SIC5907 R V II IZ CCNJPONEAJT UlYOUT cOC 21BI REV A LI JuMPERS TO BE INSTALLED IN TEST DEPT F l J AJER IJPFL f JI JEI TICN rl P I 3 PI i PI 9 GNQ c C JS t 5 5 P I 91 5M lOOK PI rt LM3 lCT la 1 1 5 P 11 MOOR r 3 I 1i 10 RS 5V R 5 1500 C1 1 f 3 22 00 2115 CONII NVO J E5T R T Jv PE R JI I k MIIINT OVER RIOk 0 JI 2 JKI JI 3 I lI L II E FSDR W l i H I Lrtll I REL 5 002 f...

Page 118: ...0 n t IN T LL p HOWN WIT N _ I D O Ne ow o e e T NOT 5 UN E o o OT ClllWt 1 STO VA UI S C ITO _e Sl t C IF I D c QI W 2 c _0 5IC5 07Fev I 2J 3 s c EMAT C IC 72 5 Rray A 10 o CPU IN T II 2 _ WIRE SOUlE m DM CDNNI c TO TO I AO 2 PLC S I 1 5 5 I GS A MO_urv OCt INC fA l CAItCM tun GAU H_u CCMPONE NT LAYOUT CPU INT1 RFAC e ASS fri exY no 711ft 2DCZ7BI 18 ...

Page 119: ...2 z s 3300 R I 132 1 33 f lI030o 2 7 700 R 16 4 IO f l I 2 6 10 K IO l5 17 2C 10379 25 I 2 Z K R 32 1 1 0 I I Z 100 I R II IS 11 10 19 1 Z 2 3 II 1z o I R 31 1 osoz I 2Z II 70 t R 2Z Ill lOS 77 I I l O ISO 1 2 W R 2 7 1 72 0 70 1 Iq 22 2 W R zq t i lODeO I ISo 7 aw R to 1 100 3 I 17 I SISTO 100 z w R Z o 1 1 100 79 I I T AN 51 S TOR aN 037 Q 5 3 3 D1 1 1 I 16 Z Neqe J l_1 2 6 3b3DC2 7 3 NSISTOR 2 ...

Page 120: ... using slide switches of DIP switch Sl allowing multiple memory boards to be used in special applications Slide switches 1 and 2 are used to assign EPROM addresses which occur in 8kbyte blocks from 8000 to FFFF hex The output of IC U12 Pin 6 is used as an enable strobe for the EPROM chip select decoder IC U13 allowing the proper memory IC to be selected Slide switches 3 and 4 are used in assigning...

Page 121: ...proper position In a standard Remote or Control Terminal all memory board slide switches should be in the ON position B Verify proper 12 5 5 volt supply voltages are present It is best to measure these voltages at the actual memory Ie pins C Check EPROM ENABLE signal IC U12 Pin 6 by observing waveform EPROM should be enabled frequently when the system is operating properly If no toggling is observ...

Page 122: ... OCIATW INC 0 11 11 u r UUACM 1 1 II caUrA uurOtH 1Io n J e ol O SCHEMATIC J 0 P C ASSEMBLY MEMORY BOARD aX ll I no wr I S rol J a ACT 1 1l U u x If ft 0 g OWN L 20 NOV 76 ICAU ON e C v v eN F C Ol C P 9 I 0 7 I 3 5 k J Q a ll n PrY 121 1 I ...

Page 123: ...I I ______ _ t I I L r a I Ii 0 J II I r iJ I i i n ra I i I n _ OI r s 9 0 t 0 4 I 44 44 rtt rtrtti rtti n s 6 0 _ I 6 s I 444 HH4444 HK HHHh 444 HHH_ r o 1 J t4 14 _44_ _ l _ ttttt t I F n o __ I J sn l JE ISM 2 1 i I I n l bot 0 1 I t IT n 0 I r t I r I z t I r o u IZ It ...

Page 124: ... JSll OllJl J S I fJOl OM 01141 10 mlll U d OIJ ll1dd o IJIJ1 S 110 O IIIU O II 1 0 51011 1 110 NO dJ n In I iliON r h I liZ 7 I I ______________________________________________ CO T In I r i j __ it t JT LZJT E I l r o J I e I I I J I I u II r I 1 r ill ill 1 1 l a i 1 a t I Cic o y o o 6 Ci 0 oo o W r 1 H 8 1 2 a c t n oAo t I Izn JJ i l I 1 I yo f 1 I I rl J ItJ l OUT Sf 1 I 1 t ...

Page 125: ... 4 ME M or C2 1 SJ G Ll J L1 LL lJ Ll J L I lJ r L m mCi I 2 u C I c a I3i8C Z Gil IiI C3 G 2GIc uBI elot II I S lIZ3 1121 III III r a a f oil III FC23 CZI GQEJ Ria R5 mnD R I E R 3 QTI Ra 1fQ R I U UI1 Illl III r r o a or f oil oil L J I tiZiiII CI J 1dZ3iIC ll Gi29lc c z iiiiii1I III 8 UII I g J 2 III III J III IlmD II U2C 111 I o r 011 i Uh C 20 urn GlZ i3 e fa C18 lu o VI C IO UI III r a r n S...

Page 126: ...10311 6 1 5 Il f SWIT CliP TC S 5 6_ca 31 008 1 IJ j 1 3 J 0 C Nt 7BI aT 3_0177 I 1 2 to Co 0 SN t SI3C 3 DSOO 1 1 I e SN SOO I U IC I 1 0 r c 51 4 7 S 3 _ I 9 I c 4 a _ E 20 36t I 8 I C O 5 SM8 01Ai I us us 18 I I C 7 52 _ 7 I S LA BEL b l Z f5 I 3 t C N os T 5 OIJ S I 2 J c TOR l IT c 2V 1 J 2 IU 0014 I I P C BOLlRO 51 2 D l 7Z lIl I ITEM a E x RIPiION REF DE S srocK NO i i MG a IIY aClA INc 8 a...

Page 127: ...ise until CR4 reset illuminates Then turn clockwise until the LED goes off Continue turning R30 for one more full turn Sl is used to generate a PF and RESET signal and is used mainly for troubleshooting A jumper from 09 pin 1 to ground is used to disable the internal RAM on the CPU and is normally installed A jumper between PI 10 and 01 pin 3S is used to supply power to the internal RAM on the CPU...

Page 128: ...has a valid address on it No data transfers occur unless this line is high Output line E Enable is a 1 MHz square used for bus timing Data transfers occur when this line is high BA Bus Available signals that the CPU has gone inactive as a result of a request generated by an external device such as DMA Direct Memory Access The PIC is used to sequence interrupts to the CPU by allowing higher priorit...

Page 129: ...ntrolled by VMA from the cpu In this way the address lines to the rest of the system are only active when valid addresses are available VMA is also gated with the DMA input byUlOA This allows a DMA con troller to simulate VMA to the rest of the system by pulling DMA low Data lines 00 03 are buffered by U7i likewise 04 07 are buffered by US UIOB and UIOC are used to enable U7 and U8 One input of UI...

Page 130: ...es are decoded by U3 and used to modify its Zl Z4 outputs in accordance with which interrupt is active allowing a modified address to reach 04 In this manner there are eight 8 interrupt service addresses in stead of one 1 C I O Preselect I O is assigned addresses 8000 through 8lFF in this system Ra ther than decode all 16 address lines on each I O board an I O preselect system is used Address line...

Page 131: ...connected to PRE which will go active with addresses aOOO SIFF Address lines A6 A7 and AS are NOR ed together at U16C and fed to the first active high input Address line A2 is applied to the second active high input to U2 providing the 04 offset to the base address of aooo Lines CAl and CA2 are used as inter rupt inputs and allow interrupts every 16 7 ms for 60 Hz or 20 ms for 50 Hz and also for l...

Page 132: ...and is used to simulate a power down power up sequence This switch is mainly used for troubleshooting CR4 indicates activity of the reset line and is used to adjust the power fail threshold potentiometer R30 CRl CR3 are provided to give a visual indication of operation of the 15 15 and SV power sources C U 30ARD 91D7132 Rev 9 June 1980 6 ...

Page 133: ...6L61 onv tlZ E1La16 aHV08 nd 1 1 o I I I L Hid In j O I I Hh Zin aU lOll ZH 09 atO a 02 IH 0 WQ i l l 0 to Hici In ...

Page 134: ...hould E F be low If no jumper is present verify pin 36 of Ie Ul is high Verify the following levels on Ie Ul MC6802 HALT Pin 2 5 volts 25V NMI Pin 6 5 volts 25V SA Pin 7 o volts 25V RESET Pin 40 5 volts 25V Check Ie Ul pin 4 for real time clock interrupt Signal 60 Hz pulse If this signal is absent check Ie 02 pin 40 for the real time clock signal from the CPU inter face card G Check for activity o...

Page 135: ...eset push button two low going pulses should be seen If pulses are not present check IC U19 C Check data and address lines for activity D Observe pin 23 of IC U3 It should be normally high with low going pulses approximately every 20 ms If these pul ses are not present check IC U3 pin 11 for these pulses 3 IIO Preselect A Check the inputs of IC U16A and IC Ul6B for activity coin cidental with acti...

Page 136: ...ignal is not present trace back to the origin IC U1 pin 37 B Check each pin of IC 013 and IC 014 which is pulled high by R7 to verify a HIGH very near 5 volts c Pin 15 of IC U14 should have a 1 s pulse every 13 sec IC 013 pin 13 should have a 52 sec square wave CPU BOARD 91D7132 24 ug 1979 9 ...

Page 137: ...e l l t J J J 3 I tI C 3HO N rTr r IB hO 0 1 i li l i I q u P r DT rr Jr v z Uftl OJ S i t e c 1 1 d 1 II t j Q ur I 0 IY 11 tfIN3HJS I _ I je t 0 i t I O r oann w z l O _ c I1 1 r r Vl 4 I D_ 1 _1 1 D J l c lh J J V JN r LY IICI CI lvvi ...

Page 138: ...e I t I i i L H TTT _ _ _ o ico _ tr i u i I 1 Z T t 1 1 iI T 1 I I II ii f I F I RBili _ __ I e on l I I __ I I I on TICI I L 9 r J l J I tl L A 10 In 00 t t I DC A _ I I Dorl U Ir C_ O I lIu_ n t o d ol 1 00 10 1 I l u t l ...

Page 139: ... r_t_ I t 1 t t L 1 I r I I J j 1 1 L 1 c r _1_ t t Jlv 1 i f 1 i t 1 f r fit I I I b Oil 1 1 1 r 4I r l r I t 1 1 9 r I b o I L i i l ii 1r t I _r r7 _r _r 1_rr li I i I I r n I I I I I I __ m W I t 1 t I r l t I i__r_t o r _ l 1 r I n _t_ 1r_r_t or I I I I I I U I I r _ H I I I I 1i I r t t 1i I I f _ I _i _ r_tL 3 zr I II I I I II I II I I I ro _ IT j 1 1 tt 1 1 1 t l t l i l t l I I I l II I I...

Page 140: ...0 0 I l 0 r r n l C r C 1 I r 0 r I I c F I If i IU 1 Z Z E C r g eo z e c If 0 0 C C 0 n 0 1 r r II l II C V t V z c E l _ _ C g 10 l Z t t r IA I IO 0 CIllo I Ir m 01 t 8 I I it o d r e 2 lI 0 p C I c 2 ...

Page 141: ... 7 I r Z J I Z I 0 1 0 2 I I I O 1 1 01 I I bl lOln n Elit S OO j I WI __ I 01 n iiln lin oz n lin n t I l f l L 5 00 S 2 s n 06009 II 1Wi r I 1 I c I E I 5 I L I I I 01 I I I el E I 1 I I JI LI I VI I ar I z r I CZ I OL I t E ...

Page 142: ...PECIFICATIONS 1 The maximum battery charging current is 75 mAo This is suitable for up to 7 5 AH Gel Call batteries For a larger battery use an external charger 2 For a battery voltage of 6 V it is float charged at 6 75 volts The battery is considered discharged when the battery voltage under load drops below 5 0 volts The maximum voltage applied to the batter terminals should not exceed 7 0 volts...

Page 143: ...pins Pl ll and Pl 13 The AC is full wave rectified with CRI and CR2 then filtered using Cl A potentiometer is connected to Pl 91 and ground on the CPU board Rl R2 and the potentiometer form an adjustable attenuator that is used to compensate for variances in local line voltage and frequency UlA along with R4 form a comparator with hysteresis The threshold is maintained constant with CR3 a 3 1 V Ze...

Page 144: ...ied by CR5 This is applied through voltage divider R15 Ri6 to the positive input of a voltage comparator UIC On the output of the comparator is a rectangular wave having a duty cycle of about 55 4 Battery Backu C S wi tching and Cilarging Fifteen volts from the power supply is regulated down to 7 45 volts by 02 This is passed through CRIC to the bat tery terminal R2a is adjusted such that 6 75 V i...

Page 145: ...n power C6 filters out any glitches that might alter the state of U1D If the output of OlD did go low this will tell the computer that the battery failed during the power outage To reset the latch a pulse of at least 10 ms is applied by the CPU to Pl 71 This causes Q2 to conduct removing the reference voltage to the comparator The voltage divider of R22 and R25 is used to provide at least 0 4 V at...

Page 146: ... an MRC l Control Terminal these relays are never activated and serve no function The relays are installed however to preserve interchange ability with boards installed in remote terminals These relays are capable of switching a load of up to 24 VDC at currents of up to 1 ampere Inductive loads relay coils etc should have a clamping diode wired across them to inhibit negative voltage spikes Extern...

Page 147: ... Each pulse reac ing pin 1 of 03 retriggers the first stage of 03 for another 500 msec The output at pin 13 will remain high as long as pulses at pin 1 arrive at least every 500 msec Should these pulses cease because for any of a number of reasons the program has ceased unning properly the output at pin 13 falls to ground The falling edge at pin 9 causes a l msec pulse at pin 5 I the jumper marked...

Page 148: ...r marked Continuous Restart enables continu ous retries should the first attempt to restart be un successful This feature does not appear on some early production units CPU INTERFACE 91C721S Rev 8 October 1980 7 ...

Page 149: ...adjusting the trim potentiometer on the CPU board R30 If this does not correct it check for shorts or replace 01 e If PF is normal but RESET is still low check for at least 4 5 V at pin 6 of 01 and 2 5 to 3 5 V at pin 7 If these are normal pin 1 of 01 should be less than 0 5 V If not suspect 01 If so the collector of Ql Pl 59 should be near 5 V If not check 03 pin 5 which should be near ground If ...

Page 150: ...mentarily grounding pin 8 If pin 14 is still low suspect eR6 C6 or U1 c If voltage at e red battery terminal is not 6 75 V to l V with the battery disconnected check the voltage on R29 If should be approximately 7 45 il If not suspect U2 or R2S CPU INTERFACE 91C721S Rev 10 Oc ober 1980 9 oj ...

Page 151: ... NuTi s i IJt ILEIiS OTI LI IVI L I _ I I O tie 5Ie l tl of I I JlNI 1 4W1IOy C f A fir H VllJ o 5 A f 1 11 MIL iO 4J140S thJ IRD SIC SS 07 R v i lIpr Mt Air I lIiT CIl c lB REV A AlO 1000 a T UD BLII I I Ek 7 t IAJ 1f111 Eu I 1 51 nfYT It 1 IJPPl I TlCN _ NU t t I I p t M I I I lOO K PI LM3 OT IZ l l u CLII v u A 0 1 1 EM C 1 31 Ic Ill 0 ItOK I AOYlze C J zo I LID u liD 1 5 I t 7 LIOIZ 2 110 f 22...

Page 152: ...500 c 3 d i Q I CIO ICQJ 3 J r It 1 q7 I I I OT 5 JNLU O E t I T Oft ALUt S c a C ITOIII _el D C I N OMM 1 r W I IN 0 05 2 c _ 0 C 5 07 e V z J s c Ht M Tl c C Z SO 5 v At 10 I t I C I m v q k I f g Z 1 1 1 A MG uv C1A r Jl 1NC Y6 _C I i MLna urN r COMPONE NT LAYOUT C P U 1NT1 I I FAc E ASS rou CT tn t a tD 111 o BMWIU U ex M i _ I zoe 81 1 _ 1111 r quf I ...

Page 153: ...00 R7 I f 101 e c 7K R 2 C fE IK RiO J4 Z f f I 02 f 7 3 ISOO RS IQ 35 1 1 I D2 b2 3 I SOO Rle 1 02 70 2 aoo IR23 36 14 102 2 3300 R I 13 2 S 3 3 U I 030 700 R 16 4 O E 10 K 8 10 15 17 20 f O 79 ZZK 32 1 110 1 100 I R II IS 4 0 1 0 2 12 0 K R31 I DS D c I 70 I R 2 2 f4 0 5 7 7 so I 2 W R 2 7 e i ez 2 W R zq J f OOeO 1 z w t o t l I 0 R I SIS TOJ 100 z w R 2 I I JO 7 q TPl AN SI S TOR z N 037 QS b ...

Page 154: ...using slide switches of DIP switch Sl allowing multiple memory boards to be used in special applications Slide switches 1 and 2 are used to assign EPROM addresses which occur in 8kbyte blocks from 8000 to FFFF hex The output of IC U12 Pin 6 is used as an enable strobe for the EPROM chip select decoder IC U13 I allowing the proper memory IC to be selected Slide switches 3 and 4 are used in assignin...

Page 155: ...per position In a standard Remote or Control Terminal all memory board slide switches should be in the ON position B Verify proper 12 5 5 volt supply voltages are present It is best to measure these voltages at the actual memory Ie pins C Check EPROM ENABLE signal Ie U12 Pin 6 by observing waveform EPROM should be enabled frequently when the system is operating properly If no toggling is observed ...

Page 156: ...aCIA r INC I U IAa A aUAII UHM LIlr l i cal l CAU 0 I I SCHEMA TIC v N ti FI C ASSEMBLY MEMORY BOARD 8X4 u r 3 fifl e TOLl CT 1121 u Aa LU t r 0 1 5 0 I OHOY 78i caUl II ON j eJ tOl C I F y IO r 7f 9 I 0 7 I 3 5 ID0 tul I I Jn I Zt o ...

Page 157: ...If I wt t n l ll l 1_0 A I 8 r _ t t HI J 10 ii I _ _ _ f 1 U 1 00t S ll ___ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ____ t _ _ _ _ o N 0 10 1 l F I I l I I I rI I III I I i I I I I I II i Ii 1 rI J Ie 1 1 rI _M H4 HH rH J H tr f 1 1 I i tr i I t t D ...

Page 158: ... 1 r I JT 0 0 1 l T I I 00 0 If I f II O Irl I I g J 0 01 SD9 oa hi SJI I U I tI _ 0 a I 50 0 5 11 0 1 111 51 0 nTl n l no a Cln fI I UI Ull QJI J 0 _QaIlllJ JO 5 OIJY U II j 4 liD QJ noh St aI 01 1 o n In U lDfo r I rT 100601 t l 0 I 0 i 4 j L 1r I t 0 00 T z f l L _4H I I L 4 tHtr _ TH H r I _ U lu I 11 a 1 II cr 1 1 ...

Page 159: ...n I IL iWJ I n H OH tr J lLJO EI M lfI N 1IJOUDi no I 01 1 1 I J 11r1 IUlfI 17 1514 L 3 I tIS LnOH lIM Q3 T1 7 L 51 t1 IS H lJ III I SdICl NOI LI Od 1 t r 173 NI CDTlVl NI 01 S L3 00 71 3 3 1 r c W3 SC 7 H9IH 17 NO Cl3 T l17 L 1 I1 0 1 0 1 Sow I tO nN 3 3 tI l3I 1I LN3Cll SJ N3NOdWO C OW 8 ILOI6 1 LI1W3H 75 C OS Oo gS JI Cl I7O a J d c SO V IO W I ll roYV S 3n vII tlOllJ 7c1I7 01 M I o WHD NI 3 V ...

Page 160: ... l fZ GC z 19 00 1 8 C 6gf6TO I Co l 2 s f loaoi I 2 S C t 2 l J M II Ie E SI ii O 1 R I i i1031 I Ei 10 K 1 5 1 I sW c OIP i a J TC S 206 31 tOO t 1 I Zo C u NCo 79 2 3 QC1 I I I 1 2 I Co INu SI I 3 DSDO 1 II I 1 C I S N I SOO 3 l O Cf I 1 0 Lc ENu I 1 1 5 b 4 J 9 I e J 4 z 1 3 i e I Co I SN 4J 2 r I O1 7 I e I us us i CJ s l SZ r 1 I I LASE 3 I I Co 2 CCTOR KIT I p C BO 1RD ITEMI c R PT OI J I I...

Page 161: ...n parity in a 10 bit frame Transmissions are bi directional and non simultan eous 1200 baud 300 band switchable Character parity and longitudinal check sum on messages Two frequency continuous phase FSK MARK 2200 Hz SPACE 1200 Hz 600n telephone lines strappable two or four wire configuration The MC6850 Asynchronous Communications Interface Adapter IC U8 provides the data formatting and control to ...

Page 162: ...ting according to the status of the read write line and the board address Outgoing serial data is modulated into dual tone frequency shift keying by the XR2206 function generator IC UlS Serial data input is applied to pin 9 A high input causes a low frequency Mark of 1200 Hz to be generated A low input causes a high frequency Space of 2200 Hz to be generated Resistor R38 is used to reduce harmonic...

Page 163: ...he factory with red lacquer to discourage casual adjustment The procedure for making these adjust ments is described in Section V but it should be stressed that such adjustments under normal circumstances are un necessary Each of the procedures outlined below assumes a one site system For multi site systems each Remote Terminal must be connected in turn and adjusted It is suggested that initial ad...

Page 164: ...ections see Figure 1 4 NOTE A simulated telephone line with 30 dB loss may be constructed using a T pad with 560 ohms in each arm and 37 ohms to common 560 n 560 n 10 0 27 n Figure 1 0 SIMULATED 30 dB PHONE LINE A Simpson 260 VOM or similar equipment may be used in this adjustment procedure Step 2 Apply power to both terminals Push ACK acknowledge at the Remote Terminal keyboard Disable all active...

Page 165: ...lOUT sO 0 6 Figure 1 1 Two Wire Interconnect 560 il 560A 560 tl S60n ASSEMBLY 02 20A2716 3 3 4 4 TELCO 50 O IN OUT 6 6 Figure 1 2 Four Wire Interconnect 10DEH II BOARD 91w7 23 3 Rev 27 February 1981 5 ASSEMBLY 20A2716 TELCO IN OUT ASSEMBLY 20A2716 TEl CO IN OUT ...

Page 166: ...Subcarrier and Telco ASSEMBLY 20B2719 SUBCARRIER IN lOUT DEMODULATOR IN COAXIAL CABLe GENERATOR aUT DEMODULATOR IN GENERATOR aUT Figure 1 4 Subcarrier Interconnect MODEM II BOARD 91D7233 Rev 27 February 1981 6 SUBCARRIER IN ASSEMBLY 2082736 ASSEMBLY 20A2719 SUBCARRIER IN lOUT ...

Page 167: ...rol and Remote Terminals Mixed systems Measure the output level at the Telco Output terminals at the appropriate terminal Zero dBm should be observed Using a calibrated oscilloscope measure the vol tage at the Subcarrier Output BNC connector at the other terminal 1 5 volts peak to peak should be observed The OUTPUT potentiometer above the BNC connector should be ad justed if necessary to meet this...

Page 168: ...al Step 7 Place both terminals in OPERATE mode Push the RESET button on the front of the CPU boards at both terminals Re enable the Remote Terminal by using the SITE ENAB key at the Control Terminal keyboard Refer to Section 4 6 3 of the Control Terminal manual for a full explanation This step is essentially the reverse operation to step 2 above Step 8 The Control Terminal and Remote Terminal shou...

Page 169: ...ed on the Transmit LED s Two Wire Systems In a two wire system each unit can hear itself speak so the Receive LED remains on most of the time Sometimes a pulsation or flick er can be observed Other Systems The Transmit and Receive LED s will flash alternately at both terminals If a Receive LED remains steadily the input level on the board is probably too high Step 9 Systems Involving Subcarrier Up...

Page 170: ...se frequency counter input im pedence B Reduce false triggering by placing a capacitor betweenTPl white and ground It is suggested that the terminals be connected back to back at the same location see preceding section so that both ends are easily accessible Step 1 With the terminals not connected to each other pre pare to set the frequencies as follows Connect frequency counter between TPl white ...

Page 171: ...ROUBLESHOOTING A Refer to Section IV for instructions for adjust ment of the input and output levels If trouble is encountered B Check DIP Switch positions Normally slide switch 1 is ON and other switches are in the OFF position Make sure Sl is in the OPERATE position at all ter minals C Verify that proper power supply voltages are pre sent MODEM II BOARD 91D7233 Rev 27 February 1981 11 ...

Page 172: ...ST TRAIISMIT INDICATOR LOW f fH QUENC ADJUST HIGII FREQUE NC ADJUST AREA FOR TROUBLE SHOOTIN I TEST POINTS 2J4 S 7 B_ 10 TP8 TP9 TP O VIO ElLlJ BRIJ I T P2 GRt up VCO TEST WN O ERATE FIGURE I MODEM 11 TEST POIIJTS ADJUSTMENTS CONTROLS 5 BOARD SE LECT S4 t BAUl RA fE DEADMAN ENABLE USED ON MRC FAMIL MDS LEV AS DCIATES INC s U CIi GOLlY AUrO_MlA atn MOOEM TI ADJUSTMENTS ETC 15BI1I7 L 1 1 ...

Page 173: ...NAltY ERIVE POSITIVE StOrE IRI t EREl SWEEP 2 SET SWE EP liME 10 MJIIEVE 1RACE A 1 El ENERI TOH DEVII TION 10 ACUIEVE T RAt E 3 r rrTt llr u r n r r l rllPn I A j 4 5 111 n 1 fiRST US O ON tJ Hl l MD L V AMSDCIATES INC IANIA AII AIIA 1I 1AII rAil 1i0 A I AlI OIlNIA Sll UOARD SlJU I lUUEH PlftHHN ...

Page 174: ... _ _ __ ON1 a YJaO DIIfiII ...

Page 175: ... H I N l N3 l IOiru o N3d 3i cr NMOW IN_ l l I 03 l 3N l1 53 A O a 31l1 S N I 3E 0_ 0 L IZ I 3 t l bObS S O O Z O O l l V i N Wlz t n 250_ c O I 1 Y fH WI ii J f n bO Is iI C liI tIJ_dS CtCj IMl f3t 1 J c N I S _O t J 0 to st d on S IC iN I Ic 0 0 0 0 OEl 751QO C iU c 0 c ...

Page 176: ...e J 1 _ il i _ w b b C 0 OOI OO I J S c _t 4jl Q S I 001 I f 1 1 _J VV 1 I t X j I I I 01 o cI 1 1 0 11 1 1 31 1 NtI d l 5 c fY 0 _ S J r I I 5 lfIIm C __ I __ n C 9 J 1 O f i r r J t e l O O 1 I E lb I f t i 0 l _ wa i Y 10 1 0 l t d t I I ...

Page 177: ... QgC38 rR Si r I lU r4 IUS I l c _ J U 3 z PZ IIC4 i LOW FRW I 20T OK 14lSB R4 l MI A4 rIDlfr in I R4 A41 QZ FllfD It 11 A 20T rOK R 2fm C4 J l _ N R4JIWrn C4 YI ul6 MCI4411 UI Ol Mrn R55 64lZ 8 II OTIZ 5 1I2206 z ilifli L AIiC IJ J C50 5 1 I I 1154 Rn CRS ai X 5 K R6 Q4 0 lkl eR A561g CR6 51 I K R62 _ _ u 0 i 51 I K R63 Rl 1i C41 C491m9 1 2JD C46 JKJ l V E W A S SS S tCI P C c e AJO L Ii DS wo T ...

Page 178: ... r r 3 i I 1 Oc z s 146 t 9 R o J 3 7 J 1 HI 4S 101 go IC Z 1 O IGI34 144 To a 1 cP IT 18U I 4 CI1 i 43 a 0 C It c I J j4SJG a i 42 L I 1e cJ Ift lS xoc p IOoIoI I UiZ I 0 1 11 3 1 I N Q o t O Z O I 9 f IO r 3 a I C S 3OOta __ I_ C 0 1 a I I OU 5 9GIQ6 t a2 l lCZ 7 36 a fMaTClltOl A Me 701 1 o t I b5CHGj 35 I J MOTOI t A MC Bua t1 SOl 2 1 34 U I 7 CP P M fI 3 4QCD8 I 3 1 0 l O C t 7 cal J 32 U I I...

Page 179: ...d to reduce RF interference Each input line is individually fused using an AGC 1 4 amp fuse Transfdrmers Tl_and T2 are 600 ohm to 600 ohm match ing transformers Resistors Rl R2 R4 and R5 are used to convert 600 ohms to 300 ohms for use in the 2 wire mode Resistors R3 and R6 are used in the 4 wire mode to make the phone line connections approximately 600 ohms Diodes Dl through D4 are used to protec...

Page 180: ...ch input is a balanced 300 ohms or 600 ohms A Bell 3002 unconditioned data circuit is specified The use of long over 1000 ft DC continuous circuits is not recommended as their AC frequency response is not guaranteed and induced currents may prove troublesome IV TROUBLESHOOTING 1 Check fuses and fuse clips for continuity 2 After lightning damage a Check inductors for open circuits b Diodes Dl throu...

Page 181: ...I I 6 6 I L____ J L _____J FIGURE I TWO WIRE INTERCONNECTIONS r 1 9 f T8 f r I I I I TELCO TEl CO I I INPUT INPUT I I T8 3 I CONTROL REMOTE I I T RMINAL T8 TER MINAL I I I I I TEl CO 6 TEI CO I I OllTPUT UTJ JT I I I T8 T8 6 b I L ____ l FIGURE 2 FOUR WIRE INTERCONNECTIONS MODEM TELCO INTERFACE 9LA7147 Rev 9 June 1980 3 ...

Page 182: ... 470 FOR OUTPUT USE TERMINALS TB I AND TB S FOR INPUT 4 rh I S DIRECT CHASSIS GROUND 5 P C BOARD 51B5856 6 COMPONENT LAYOUT 2082716 fl 1 4 AMP F2 1 4 AMP f3 1 4 AMP f4 1 4 AMP I C3 01 L3 IC5 01 l4 l C7 01 I Ii tt It 8 c It u t c Z II 2 R3 r TB 6 270 TB 5 I C2 01 1 I C4 0 1 1 l C6 01 TELCO OUTPUT o T8 4 o T 8 1 TELCO INPUT G TB 2 CB R6 1 01 IB 3 270 fl RST USED ON MR C I U l I I p MOSELEY ASSOCIATE...

Page 183: ... REO OPENllfG TOWARD THE LEFT INSTALLED 1 1 II 1 11 I H 4 PLCS IflACI ET WAUea 15 SC IPLCI I 4 1 321 0 11 I H SCIIEW WITH IIIIIIIIIIT Z PlCS SPLI r LOCI ASHEilIZ PL CSI U A ft T ri e a GiD qp 4 J Q CI 1 4 a I J e rf 1 6 oa QD LI fiLl I H 12 PLCS KULKA 51111 2004 1 f 6 32 1 16 I H SCREW TELCD INPUT TELCO OUTPUT u BUSWIRE hPlACeS 0 o ITEL V o l A BEL IliA 1069 2 i II I la ar f i MO L V A OCIAT INC N...

Page 184: ...ection from large surges on the phone line Resistors R13 R14 and R15 form a 600 ohm impedance match ing network between the phone line and the transformer Tl is a 600 ohm to 600 ohm impedance matching transformer An XR 2206 function generator IC 01 is used to generate an FM signal from the frequency shift keyed output of the standard modem board The frequency of oscillation is con trolled by apply...

Page 185: ...NE 3 Disconnect the frequency counter and connect a distor tion analyzer to the generator output BNC Adjust distortion pot R6 for minimum distortion Using this control approximately 1 2 distortion is obtainable If no distortion analyzer is available no adjustment on this pot is required The worst case distortion is ap proximately 2 5 which is quite acceptable in most applications 4 Disconnect the ...

Page 186: ...may be observed at Pin 7 of the XR2206 function generator IC Ul 2 If no output is observed check on chip voltages and grounds If the IC is replaced verify proper adjust ment by performing the subcarrier adjustment procedure described previously 3 Note the modem card must be properly adjusted and work ing correctly for the subcarrier board to function Refer to the modem section of this manual for t...

Page 187: ...l Q L 1 I WAVEf I 1 E ll C 2 MUll OUT II 4100 NOTES I UNLESS OTHERWISE SPECIF ED RESISTOR VALUES ARE IN OHMS W 0 CAPACITOR VALUES ARE IN M CROFARADS I 5 GR 0 UN DON CPU 8 U S J I S DIRECT CHASSIS GROUIII 3 P C BOARD 51B5865 02 1 COMPONENT LAYOUT 20A 27 lC3 0 i l t I 0 ca I lOOK uz Me 7auz ACP c T V 20 200 I ZO D S TOR TlON r 15V CI PI 5 J t 50 C5 X 2 q no fiNE FliED 22011 R8 4 9 I 1 0 R9 ZO 1110 1...

Page 188: ...11 7C o C 0 200 FZ g 1I1A AGe d C I Lt IOA llI ell ij SOV Wi t Cl l i ct 0 el i lot r J 1 MCralilAeP lOOK C1 u r C 0 oy lY ANf LE RH Al O 1575 c I I Pl Sl 1 1 1l N i l 0 3 II t D a 0 III ii ci I O IR _ It NOTE 4 OUTPUT fa 32 X IlZ B J t StROI b HEX t lUT 711 c lOtK WASoHER ALL 2 PLC OUR l FREQ FINE FRIQ BNC U IOQilJU N o 1 N J VJ J SUBCARRIER OUT LABEL IOA1069 4 WIa ZX 3 1l S H ZPllS FIRST USED ON...

Page 189: ... is used to reject frequencies other than the telemetry subcarrier The components used in the input filter are frequency dependent and are specified according to the subcarrier band being used Recommended signal input at Pin 2 is from 10 mV rms to 3 mV rms The operating frequency is determined by CS RS and R6 Resistor R3 and Capacitor C9 form a lock detect filter to eliminate chatter at the lock d...

Page 190: ...cy subcarrier may be superimposed on the FSK signal this is quite normal IV TROUBLESHOOTING a Verify correct power supply voltages are present on the board 5 12 and 15 volts b Using an oscilloscope observe the extraction filter output at Ie Ul Pin 2 This signal should appear much like the subcarrier generator output If it is distorted check in put filter for prope tuning or defective components c ...

Page 191: ... 0 n 0 z z 0 n o c o 0 _ n a 0 Tn 7 4 L J nmrr P L J o I ls r i J I r _ L I I Ii ...

Page 192: ...WN S SOLDER FUSE CLIP EYELETS TO C IRCUIT SIDE 0 OAIU 1t1 1 0 Cl a a _ pi n 99 2 82736 103 BREAK TIIACE 10 PIN II coNtlECT JUMPER TO Pili Us 28 IIU5 WIRE lltO c CI SEE NOTE 4 10 mn A L4 u t8l CONNECTOR INC UI IOI4 U NOTE S 1 15 C WALSCO BRKT 2 PLC l2 K 1 4 B H SCREW I ll HEX NUl 6008 3lAT fUSE ClIP5 5 4 X 1 4 B H SCRfW 2 PLC 3 41 HEX NUT 2PLC o IA21114 PANE L LABEL IOAI069 5 GRWND LUG BENT UNDER e...

Page 193: ...Timing capacitor C6 is also used for frequency control Its value is dependent on which sub carrier band is used Capacitor C20 is a bypass capacitor required by the IC Resistors RIS and Rl6 are used to re duce the total harmonic distortion This can be reduced to 1 2 by trimming or in the worst case approximately 2 5 The DC output level is adjusted by applying a voltage bias to Pin 3 using R14 The X...

Page 194: ...gain 741 op amp is used as a buffer III ADJUSTMENT a Subcarrier Generator 1 Remove modulation applied to subcarrier generator using the send level pot on the modem RSO 2 Connect a frequency counter to the GEN OUT BNC Ad just subcarrier frequency adjustment R20 is a fine frequency adjustment Both pots are accessible from the rear panel and are labeled COARSE and IIFINE 3 Disconnect the frequency co...

Page 195: ...ator 1 Telemetry Extraction Filter Adjustment Apply a modulated subcarrier signal to the input Ad just inductors Ll and L2 for maximum plitude and minimum AM The filter output should be similar in appearance to the subcarrier generator output 2 FM Demodulator Frequency Adjustment Apply a modulated subcarrier to the input Adjust RS for the cleanest FSK output Note that some residual high frequency ...

Page 196: ...ection of this manual for trouble shooting details c Subcarrier Demodulator 1 asing an oscilloscope observe the extraction filter output at IC al Pin 2 This signal should appear much like the subcarrier generator output If it is distorted check input filter for proper tuning or defective components 2 Check demodulator frequency as described in adjustment section 3 Check operation of 741 Buffer Amp...

Page 197: ... 0 0 V 0 0 c c i i 0 c i 0 to o 1 0 0 0 1 S i c o j 8 V r J i ...

Page 198: ...0pf 25301 1 A 2 26KHz 470 1800 008 01311 01 0611 19301 1 19301 1 8 3 39KHz 820 2700 3600111 031 4700pf 03101 13000t 1 3000t C 4 67KHz ISOO 4100 12000t 01 0016 01 7 500t TeODt 0 5 110KHz 2200 6800 4100f 3800Df 6200f 3600pf 410 of 5600f E 6 200KHz 3900 I I K 1300t 11100t 180Dt IIIOllt 27001 470 lit F s l PAN L A263 6 32 X 1 4 WITH a H SCREWS P CS HUTS 2 CONNEC BNe UG 2 PLC loA8EL IOAI069 318 GROUND ...

Page 199: ...mode rejection at 60 Hz is 35 dB with a common mode rejection within input voltage range of at least 60 dB For best overall accuracy the normal mode input should be close to 3V wi maximum inputs not exceeding 5V Measurement accuracy is 0 1 1 bit The maximum input voltage from either input to ground is 5V Exceeding this voltage will cause improper operation of the board for the duration of the over...

Page 200: ...is will double the conversion time and reduce the update time by half A 30 ms rate will sample the input for almost an entire power line cycle al owing most of the 60 Hz signal to average out IV THEORY OF OPERATION The A D board is selected by the microprocessor when pin 22 of the MC6821 PIA IC U2 is pulled to a high state Switch Sl and a 74LS86 exclusive or gate IC U11 form a programmable inverte...

Page 201: ...n PB through PB4 These same lines double as outputs to select 1 of 20 analog inputs PB and PBl select 1 of 4 multi plexer inputs while bits PB2 through PB4 select 1 of 5 multiplexers using a 74LS138 decimal decoder IC U13 The ADB 1200 IC U3 is the digital controller for the LF 13300 analog building block IC U4 Together they forman integrating l2 bit A D converter The AB0120 0 provides the control ...

Page 202: ...ty of the analog input At the midpoint of this phase COMP from the LF13300 is examined for polarity If COMP is high the input voltage is positive If COMP is low the input voltage is negative The Polarity Detect signal PD RU will be high during this entire phase The above operation is also necessary to determine which integrator input posi tive or negative o the LF13300 should be used for proper A ...

Page 203: ...92 clock eriods the Ramp Reference RR signal goes to the low s ate the counter output is loaded into the output regis er and the End of Conversion EOC signal goes high e polarity bit will reflect whatever value during Phase II The output register will hold the until a new conversion is completed and new data ded into the register The Output Enable OE line be low and SC must be high to enable the o...

Page 204: ...r Input Channels 18 and 19 monitor the voltage generated by U8 Channel 20 monitors the 5V supply iT TROUBLESHOOTING A Verify that the AID board and the interface card are plugged into the corresponding slots B Verify proper switch pos i tion by checking the board address strobe C Check power supply voltages on this card D Using the technical description and Fig 1 observe the waveforms of the LF133...

Page 205: ... PIN 23 OUTPUT DATA OC PIN 20 PO RU PIN 21 RU PIN 22 RR PIN 19 COMP FliN 26 2 6 Ilf 2 6 x I f 2 6 X Ilf 4096 X Il f _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 1 8192 x Ilfl _ _ d LY rffll 1 S f L r DATA ROM FlREVIOUS CONVERSION LTRISTATE NEGATIVE INPUT 2 6 x I f I 2 8 x Ilf 2 6 x Ilf 4096 x I f ________________________ 1 8 92 x I f 1 _ __ j 01 l tY Eoe OE 57il IN 23 FIGURE I AOB1200 LF13300 TIMING DI...

Page 206: ... PVl 0 L a I b C 6 r r r I r V lINIS S N N V __ MJ r DT xr 1111 I S nI1 oJ t _ d N 901 1N 6 o N rI f DWW oe 0 z UIIft v g INI YICI All ...

Page 207: ... 1 3 l 1 0 9 31 c 1 l 3 l l N OJ_ l C I l f l VC oo r 3 r a t I J 3 o bL co 1 0 l N NOdW 2 II 3 01 bS IS a o I O V tl lcn IYI 1 1 1 Sa O 1 I 1 1dY 0 MI I HO II i I l f 3 lIOJ Slo e Q I lI Oio l H l C t a lNr il 1 0 0 10 c e or L t 4 w H ir r t rl e r If I o i 1 A r rl I t r If j L I t f e I rn 00 0 rr V J IC I C f l C L c I C ...

Page 208: ... t lei t b 06 T _ I 1 i ______________ _ OE lei I K ____________ I J t Q I P a I n I I L l e L rr rv IO fd rr I l d 1 I d l r 0 0I I J b S Id I I V r b 8c c I O t C A AFr l C Ap v __ P I a 00 L t i 9 t OO L t ij O C T 0 ...

Page 209: ... 11 56 lJ4 12 Ft 5 so R q 6 c a lg 11 0 LF I i OO I Lt l 1 R 1 I 40 l L 11 1 UdD z Pf Z 1 Cl t C35 RI L II DB 2tlO c 15 W vso 11 11 0 t I iOi l CI I _ 00 o oiCl Rod Q R Yso fC j J 1 r RI o Ii i 1 1 L 1 QC U I K3 JZ 1 01 14 f 8 0 CI S Ys u i r J c fiQil R _ _1 UI Rl l R 1 Ie Rio LIo _ it _ TL012 R It t il R 5 R l If Ll 01 il ffE D E oS I _ RI I 14 li r J I R t t I L I IJ r P 1 1 iT ill2t i r IUO i ...

Page 210: ...b 01 II 7 1 1 y LI bl bbOOSl S In _ _ eI el I L oto l tIff f Hld S I tf 1 lel UOOI Ill I 1 eli rr 0 to III I bL O 1 1 l e 0 1 I SI L Il 41 I o at C L 9 b V O I 15 1 ...

Page 211: ...is used to assign a board address from to 15 Board will output Channels 1 through 16 Board 1 will output Channels 16 through 32 etc Programming of Sl is shown in Fig 1 If replacement boards are installed for any reason be sure the board is switched cor rectly IV THEORY OF OPERATION IC U6 in conjunction with swith Sl is a programmable inverter for address selection IC U5 ANDS the outputs of U6 with...

Page 212: ... status bits 1 through 8 are gated onto the data bus When A is high and A1 is low status bits 9 through 16 are gated onto the bus When A is low and A1 is high the unique board ID is gated onto the bus V TROUBLESHOOTING Check for periodic low pulses on IC U5 pin 8 indicating the CPU is attempting to read data from this card Low going pulses should also be observed on pins 1 and 19 of IC s U1 and U2...

Page 213: ... 1 16 1 17 32 2 33 48 3 49 64 4 65 80 5 81 96 6 97 112 7 113 128 8 129 144 9 145 160 A 161 176 B 177 192 C 193 208 0 209 224 E 225 240 F 241 256 FIGURE 1 S1 PROGRAMMING STATUS INPUT TTL II 91C7237 Rev 27 February 1981 3 ...

Page 214: ... I i I r I rl L G L 16 _ IliON CI1 ci2 I xa _zzr O l 1 J J ndNI S 0 L V LS g l1 L W3H JS l a _ UMO w O l2 l O _ _ _ _ YJJIW O 1M WI IICI_ OW ...

Page 215: ...a 44 J1 10 o I ERUI U7 PI 97 MI 99 100 csI rC1 C T TYl 5 220 1 I 1 I 10 5 0 1 1 2 J 4 0 GNO NOT S I UN E SS OTHERWIS SPECIFIED RESISTOII V ALUES ARE IN OHMS 1 4WIO CAPACITOR VALUES ARE IN CROFAROS 2 c eouo 5IC 912 e 4_ 10 I 3 COMPONENT AYOUT 2002 1ge RE 1 A p J3 U 7 He He II 9 NC Me He Me 5 Continued on next page A ...

Page 216: ...O L oW 11 O YtS L Zon 2 r Z 6S 1 d Oi L I Z I lIOI nl 0 611 r II S d iZ S 0 IS I 8Z 1 d 6 l d lZ S d i IZ Id 4 i Id Z L 1 9 i i d Z H d It U Z I L Z d ZZ Z d I I O IL l L all L f 0 Io L 5t L S I Loll r 6 lI o L U 9 911 Q1ft S l 6 oE n 8 f W 8 OI L Ell at ElM I l v 1 IT lIOI i 11I E 9 I W 9 lI0 C 1 I I I I 1 1111 I 21 i lIo L Il I ca l 0111 an o s En r H Qt Zl t lIO C 511 It If i r s Z d z I Z d 6 ...

Page 217: ...I UN SS OTl4esa W Se E 5TOI l Po Ue S 1 e TOQ JAl UE S S e c S 1 ec RE IN O M 4 W 07 Re N I CROFAi OS l oIC I J l2 l e ECO o aD 51 YEL W 2 r C 50c e T 0 IE IN5T I ol l cI T EACH C _ lC ON 3 SWIT H 51 0 OE NST a I E O H THOI lT A O KE T 4 C BOARO i 5 9 2 1 10 2 1 SC H i PoT C 9IC a3 I ev C4 RIB RI9 R20 Rl l C7 A MO L V A OCIATe INC UHrA u It It IIISUItCN a 1 callU CAll O NI n C OMPONE NT LA 1 OI JT...

Page 218: ... S lf74 LS 2 44 U7 3 06085 3 I l SIJ 4 L S 2 4 0 u U 2 J IJ 3 060974 3 6 II SAJ 4LSI3 3 u4 3 0 50800 I S S N 74 L 5 S6 UID 3660743 I 4 I SM 1 4LS30 us 3 50 735 1 LABEL lOA 10 5 1 34 30345 I 2 EJEC TO PA C 1 24 o9 IJ IcSOOl S 1 I P e BOARe IC591 2 IO 2J 3472 14 0 1 DE 5CR IPT10N REF DESIC7 STOC K NO QTY Q A MO Lay A OCIAT INC l u iliA 1II11 eM IIL lQ COLna C lllraIllN A COM PON E NT LA f OUT LA STA...

Page 219: ...ltages the resistors will have to be changed to 560 ohms This will allow operation from input voltages from 3V to lSV The maximum voltage from any input to ground should not exceed 50 VDC Exceeding this voltage may cause damage to the board III ELECTRICAL ADJUSTMENTS Switch Sl is used to assign a board address from 0 to 15 Board 0 will output Channels 1 through 16 Board 1 will output Channels 17 t...

Page 220: ... are used to bring the first eight channels onto the data bus while U4E H and U5E H are used to bring the second eight channels onto the data bus U22 provides a unique board IO pattern on the data bus when selected V TROUBLESHOOTING As a general guideline if only certain bits on a card fail to function properly the cause is usually associated with the input optical isolators Complete board failure...

Page 221: ...U5 If not suspect U1 through U3 or 81 Note that upon power up of the unit at least one of the 16 inputs must be inactive no current flow or the CPU will not recognize the existence of the board MRC 1 only Address Channels 0 1 16 1 17 32 2 33 48 3 49 64 FIGURE 1 4 65 80 81 PROGRAMMING 5 81 96 6 97 112 7 113 128 8 129 144 9 145 160 A 161 176 B 177 192 C 193 208 D 209 224 E 225 240 F 241 256 STATUS I...

Page 222: ......

Page 223: ...C 9 P R ul tJs uu ua3 JI 97 9S s9 IOO cal JI I 2 J 4 HO a I OTE I 1 1 nn DWI CSlf t n 1r n ilESlSTt fI vAWES ARE IN OHMS 114 w 10 fIIOTOR VALUES AR IN CR FI AOS Z C BOAI O I C 91t RE O O J CONPONENT LAYOUT 2002795 a A I I SUPPLIED FOR TO 30_ DRIVE CURRENT 10 TO 48V OPERATION FOR 3 TO 15 V OPERATION RESISTOR VALUE IS 5 0 OH S AS REQUIRED BY THE USER 5 BASE AOORI 5S 8 C REG CH 1 8 RC G I CH IIQ REG ...

Page 224: ... MCMI v _C I I _ l L SCHEMATIC I Q STATUS INPU T OPTC lI _ i r 1 1 tH I 1 J Z t a I s A I 5 1 1 9 _ _ _ p _ 7 9 C 2 36 Zll J IUJ 0 dO I ...

Page 225: ...H II wl SE SPEC IFI 0 Rt SI5TOR IALUeS AII IN 0 1 9 4 H 10 CAP C ITOR Al IJES c ae U1 C PlO A R oS 2 1 C4 SOC KETS TO ae INST I ED AT E AC I C l OCATIOM 3 SWITC foI SI TO BE IN STp LLEO IT 040UT A SOC KET 4 PC OAA D 51C S 91 I REV 10 2 0 S SCHEM T C 1C Tc 3Eo Re i A C2 CJ 10 Ol r OOlVN t 1CI TO At AIIVS T pc 60A D C4 U4 Y 5l us 4 LS2 4 0 4L 2 0 l U11 rw B T4LS 2 4 0 ASSY 2002795 U1 9 4LS 2 41 y tt...

Page 226: ...2 2 U 3 3 2 5005 7 4 9 I C TII Ila J co val 3 7307 7 Icc 8 I SJJ r4LS 2 4 4 u 2 3 31060859 1 II S J 7 4 52 40 U4 us U 2 2 310100974 3 1 S Jr4LS139 U3 3CO OOSOO I S I SN 4LS eta J I 3 CO 0 43 I 4 SN 4LS30 J 2 36601 35 I 3 AeeL MA lOAIOC08 G 3430337 I 2 EJEC TOR PJ IIR tf 09 1 2 1 2 500 5 t P e BOARt 5lCS911 10 2 0 3 172 153 1 IT t DE sCR I PT ON RE DESI r SToel NQ QTY ci A MoaaLev AaaOCIATlla INC o...

Page 227: ... 15 Board will output Channels 1 through 16 Board 1 will output Channels 16 through 32 etc Programming of Sl is shown in Fig 1 Sl is programmed at the factory and will not normally require changing Any replacement board should be switched to the same configuration as the origi nal board IV THEORY OF OPERATION IC Ul in conjunction with switch Sl is used as a program mable inverter for address selec...

Page 228: ...on of the PIA If R W is low pin 1 of IC U13 and IC U14 will be low enabling a command to be written into the PIA Output CB2 on IC U6 is used to disable all outputs simul taneously during a failsafe condition Transistors Ql and Q2 are current source to interface the PIA with the drivers V TROUBLESHOOTING 1 Partial Failure Some Channels Work This indicates that at least some PIA channels are func ti...

Page 229: ... board is attempted If no pulse is seen verify operation of 51 U1 U2 and U3 If a pulse is seen at PIA pin 19 verify that the pul ses are repeated at pin 1 of IC U13 and IC U14 If these pulses are present suspect U13 U14 or U4 OUTPUT OPEN COLLECTOR 91C7171 24 Aug 1979 3 ...

Page 230: ...F OFF 4 65 80 OFF ON OFF ON 5 81 96 OFF ON ON OFF 6 97 112 OFF ON ON ON 7 113 128 ON OFF OFF OFF 8 129 144 ON OFF OFF ON 9 145 160 ON OFF ON OFF 10 161 176 ON OFF ON ON 11 177 192 ON ON OFF OFF 12 193 208 ON ON OFF ON 13 209 224 ON ON ON OFF 14 225 240 ON ON ON ON 15 241 256 FIGURE 1 81 PROGRAMMING OUTPUT OPEN COLLECTOR 91C7171 24 Aug 1979 4 ...

Page 231: ... _ _ ...

Page 232: ...iew N29 2f J3053 e c a e Q I i OOc1 Co 1 Jc J COMPONENT LAYOUT 2002735 4 RC BOARD s cseeS 5 O S WITCJ l DIP CTS z O 4 QZ 6 e l J 9 R W 3 orp 3 01 U 3 II I oe 1 j 23 II CI 4 9 I J 291 0 lE Joe 27 c 2 Qj CJT RE SE T 2 C 2 0 RS 3S 51 M5 V Rr SISTORS R I Tl IRU RZIQ ARE IUSTAl I D OklL f FDR 2DD 2 155 2 1 9 cae P IJ 2 Co ROL PII r CON T OL 2 2 4 CON ROL 3 P 3 CON T OI 4 PfIIW c C ONI VOtOL 5 p e l CON...

Page 233: ...CTOR II IS II 17 aD 11 19 Z 11 al 21 II 23 3 11 25 2 11 27 4 1 1 211 a 3 11 31 5 11 3 l 2 11 3 5 37 as 1 I 3S1 7 1 4 2Ia 1 43 eo II 4S Z Jf 47 3 11 9 2e I 51 0 I 3 29 II 55 II JI S7 11 59 12 11 QI 31 11 3 3 JI CD 5 a II 67 14 11 g 33 1 71 15 11 73 r4 11 7S Ib 11 77 S e 5 A Ma acu Taa lNC c a u 1 n g 5C lE A jIc OPe COu c l h 0 CoWJ A ND o i P li A t 1 Ou A UTT 11 Jl D ID _ Ir CI M II J4 ac a u J C...

Page 234: ...r lc o UIQ I m 9 lilt S l otD c c ID c lqC Ill o 0 oo ILGO l sa SD c 1 KI u JfU I_ u Z C17 E 7 tL 3D 001 0 c c IIO olll oo I eo C I 8 5 110 B YO PDog P I p r SD 1 e 1_ 00 10 t NOTes UNLESS OTIo4I RW oE SPEC F ED E S laTOR VALUES ARE IN OHMS 1 1 W 1 10 c P C I TOR V LU ARE IN N IC ROFA R OS 0 2 P c f O O SI C SSS5 S0 o 3 sC e _ T C q Co 7171 4 RESISTORS Rtf THRU n2b ARI IlISTALLEO aNL FOR 2002 199 ...

Page 235: ...9tO 43 U7 1 _ 25 00 I b So 1 2 II T ANSIS O 2M 305 3 2 31030035 I 10 i 1U hlSIS 0 aN z q2 L4 G JI 363002 1 I q L A 0 E IDAliJtoB 9 3 03f O I s I SN7S 7 U7 U 4 3 boq I a 7 II Me a2 J u3 371002 7 I 7 LS 2 U S L OS5q Z S 7 SB6 UI 3bbO 7Ji 3 7 L S 30 Uz 3c a 73S I a I c 7 L Sa 00 Ue 3 O bq I 2 E oJ e c TOR PA r R 70 1Ir 4 z 1 OO 7S I I P e eOA Q 51C58BS 3 1i2b 1Ll I I r N NO OE S C RI P T 1a N n I sro...

Page 236: ...larity and inductive load protection The maximum voltage from an output line to ground is 50 VDC Exceeding that voltage may cause damage to the board Output is floating with respect to the chassis III ELECTRICAL ADJUSTMENTS Switch Sl is used to assign a board address from to 15 Board will output Channels 1 through 16 Board 1 will output Channels 17 through 32 etc Programming of Sl is given in Fig ...

Page 237: ...eral Interface Adapter U6 the R W Read Write line Pl 64 will be high This causes the output of U3D to go low which enables U4A D and USA D to activate This allows data from U6 to pass through U4 and US to the data bus If the CPU desires to write data to U6 the R W line will be low This causes the output of U3C to go low which enables U4E H and USE H to activate This allows data from the data bus t...

Page 238: ...own for the output buffers Note the different output voltages for the PA series out puts and PB series outputs of the PIA 2 Complete Failure All Channels Check U6 pin 19 for a low level If it is verify that the emitter of Q34 is near SV If it is not suspect Q33 or Q34 Check pin 24 for an active high pulse when a raise is attempted for a channel on that board If no pulse is seen check Sl Ul U2 and ...

Page 239: ...OFF OFF OFF ON OFF OFF ON ON OFF ON OFF ON OFF ON ON ON ON OFF OFF ON ON OFF ON ON ON ON OFF ON ON ON ON FIGURE 1 Sl PROGRAMMING OUTPUT OPTICALLY ISOLATED 91C7129 24 Aug 1979 4 Address Channels 0 1 16 1 17 32 2 33 48 3 49 64 4 65 80 5 81 96 6 97 112 7 113 128 8 129 144 9 145 160 10 161 176 11 177 192 12 193 208 13 209 224 14 225 240 15 241 256 ...

Page 240: ... 0 6C l L 16 i rnnJIla j I a a O DH T O Jild tn U1910 J1 ll1W3H lS I llil l NO 03Sn l SIiI l ...

Page 241: ...ESET 11 4 10K 5 l fl U au QM 4 71 19 C82 PAO 2 ____ 1 PAIl 3 ____ I PIIZ f 4 _______ 1 5 _______J PII r6 _________J PIIe r7 _______ J P116r8 _________J PA7Ir I 9 __________________ F P8Ir P82FI2 ______________ PUI3 1 PII4 14 1 P8515 1 l II R 2 Rl 1 1 R3 1 J K IN 2 1 K 115 z J Ill 1 1 1 11 7 2 2 1 R9 HI R9 J l Rill 1 21 11 11 HI RIl 25 I RI nit RI 1 1 11 J 62 lil 1 2 K NOTES I CNLESS OTHERWISE SPEC...

Page 242: ...r fFJ ll fg 1 JI 41 8 JI 43 8 9 Cl2l 9 1 0 026 1 0 11 Cl27 JI 4S JI 47 JI 49 JI 51 JI 53 JI 5S 1 II 3J 1 57 12 JI 59 C28 1 12 JI 61 1 3 JI 63 029 t 3 J 1 6 1 JI 07 I 14_ JI 9 JI 71 15 Q31 C U2 J l 15 gJI 73 1132 i 1 6 J1 75 Cl32 1 6 JI n I 15 11o J 4 iii ell lJI 1 1 0 L n III lJ Z III _ RU PI CONNECTOII ON FII HIIEDI UNFII TEIIED IIO CAllOS r 20 2 21 22 2J l4 6 25 26 8 27 2B 10 29 II 30 12 3 I 13 ...

Page 243: ...10 11 i T C I o R3Z uo 2al RI6 Iolli I UNL 5S OTH RW 5 S PfC lrl D RESISTOR VllWES L lR t IOHMS I W IO U1PL lCITOR V lLUES IRE If MIC ROFC1RDS 2 P e BOL lttD 5 C584 REV 2 21 3 SCHEMLITIL 91C7 2 9 RE V c 4 ALL TRANSISTORS TO Be SOLDE i2 ED NIT O J T SOCKE TS 5 INSTALL D1PSWITCH S 1 WITHOUT SOCKET AND WITH SWITCH NO 1 ON LEFT SlOE WHEN VIEWING BOARD AS SHOWN llr I J MC IRLIIY A aCIA INC i 9 1 lIIln ...

Page 244: ...9 Ill laz47 I 12 TRANSISTOR 2N3G40 Q33 30 l I I TRANSISTOR 2 30S3 Q34 3003S 10 SWITCH CoTS 206 004 51 31 oa71 I 9 I C MC 92IP uG 7JOOZ7 9 I I SN 74 S 2 4 U iUS es Io a 7 SN 74LSS o UI 07Lf3 I 10 SN74LS30 U2 7 35 I 5 SN74L 500 U 3b60b I 4 TRANSI STOR 2 N O 8 7 QI 7 THRU 3 2 36303BI I 3 TRANSISTOR 2 N2924 Gil T IRIJQI 3 3002 7 I 2 EJECTOR SET Cl 09 1 2 IZS OO7S I P C BOARD 5JCSB 6 21 3 17 9D ITEM DE...

Page 245: ... inhibit RF A metal shield cover is used to prevent RF field leakage SPECIFICATIONS Attenuation 10 dB 200 kHz 20 dB 700 kHz 40 dB 2 MHz TROUBLESHOOTING Check for foreign particles across the connector pads bro ken traces and improper solder joints Check the induc tors for continuity and the capacitors for leakage Proper shielding and grounding techniques should be ob served for all I O lines FILTE...

Page 246: ... _ X C u a II II Z Ll 0 t l IL IL c I I _ PI JI 15 f I 17 20 19 f 2 21 f 7 21 23 7 3 25 22 27 4 29 f 23 t 4 35 6 37 25 39f 7 t 3 6 45f 27 47 9 49 28 1 9 HOT USED 51 10 53 29 S5 II 57 30 59 12 61 31 63 13 65 32 67 14 69 33 71 15 73 34 75 16 77 35 79 17 81 36 83 E 18 85 7 37 PIN CONNECTIONS MOSELEY ASSOCIATES IN SANTA BARBARA RESEARCH P GOLETA CALIFORNIA SCHEMATIC MRC I FILTERED INTERFACE TOL FRACT ...

Page 247: ...1 U thD 0 ill 0 C7 CI9 C32 o ill 0 ill r 0 u m CII C 1o CJ o KD u rn u ill c C21 CJ4 o lIT 0 u ill CIO c22 en o ill 0 fill 0 ru il el C 5 cn U ill 0 fill 0 ill e14 u PLA E LAIUE OM IR UIT SIDE INSTAll PI AS SHOWN ITH TAPERED OPENING TOWARD THE LEFT J I o FILT tNT T LI IB L IOAIOCO 7 4 40 X 5il6 B H SCREW WITH 4 40 HEX HUT THIN SERIES 2 PLACES AN D SPLIT RING LOCkWASHER 12 PLACES I 4 40 X S 16 B H ...

Page 248: ...about 5 8 volts or below 0 8volt when the input signal changes suddenly II SPECIFICATIONS The attenuation at various frequencies is essentially t he same as that of the filtered interface board ITI TROUBLESHOOTING Check for foreign particles across the connector pads broken traces and improper solder joints Check the induc tors for continuity and the capacitors for leakage Proper shielding and gro...

Page 249: ...2 2 I HIilJ L 17 1 R E _I So V L THRll L ARE In 5 u J 4 3 P C F OARO 51 C 359q tI COIV PD EI JI L A OUT coe 2772 T P JI I THRUlb 1m PLCS PI I 15 I 19 2 23 3 27 7 t 31 5 3 4 J 3 3 7 4 B 4 g 5 lo 7 5 12 1D 3 IIE 1 3 fD JLJ 7 I 0 I 5 7 j 7 Ib PIN CONI JLCTlON5 j l J I J o J b G L I D 5J a f MD LI Y A OCIATE INC UNTA IIUUIICH PARK 0 IIOUTA C UFOIINIA 17 0 SC f MI TIL Ii MRC I DIOD L i Rr D l 0 w I t X...

Page 250: ...ess A Adjustment Three voltage adjustment potentiometers are present for 5V 15V and 15V A sealed potentiometer is included for current limiting B 120 Volt Operation The unit is shipped from the factory for l20V Normal ly no changes are required The voltage selection card should have 110V exposed and easily visible If some other voltage is visible remove card and re insert so that l20V is on the to...

Page 251: ...place Temperature Rating 0 50o C full rated derate linearly to 40 t 700 C any power supply of its manufacture that does not perform to published Efficiency 55 at nominal input full load on output specificat10ns as a resul t of de fective materials or workmanship Weight 8 lb for a period of 2 years from date of original purchase No other Vibration Per Mil Std 8l0B method 514 proc I curveAB to 50HZ ...

Page 252: ...c P o q o E I I r I l t I I 0 0 0 9 I 1 0 5 l R5 t_ t _ _O s L _ _ _ _ _ _ _ _ _ _ _ _ _ __ I _ I 0 0 CAl 1 tf D I TO Cf I tl Ij or H I U C fl OOvc C IoN NOfD 1 lH S TA 1 t tT J N Cl t Ot t 1 ftT C I Nt t 0 O 6 I A QO r J1 ISf C c I nIl jl t 10 1 ul 11 16 _ i OUI CR9 I V I CTI r r l r U r l CTI i H P P O U co CTI r t r l QJ O P IJ U r l CTI ...

Page 253: ......

Page 254: ...1 11 TER 6J 4 T l NOTES I ALL CAPACITORS IN UF UNLESS NOTE D 2 ALL E 5ISTOR S IN OHMS 1 2 W SC UNL SS NOTED 3 POWER SUPPLY 15 MODEL HCBB 75W MADE BY POWER ONE INC CAM I01ILLO CALI F l SEMBL I DWG 21 C 2655 11 7 8 s _9 CK 1 0Z lit 750 QL Q3 9 1 AEtc alOI Gi I C i It I m 1 CIt RId R il 2 3 50 Continued on next page ...

Page 255: ...100 1 Rlo H 1 2 67 I t7 1 00 V r 7 RII3 tIS C Rt HL tHO n C JtII WION CR AEj IS I Rill b S llll 8 1119 OU Ne 18 ILJI J 11 8 8L fI If 8 J1C J CD OlF 10 3LA t 7 11 S J1 J1 4 Ti J1 1 J1 2 p ZL GRY W HT __ II Z 2 W H B L U _ c J1 6 IS l1 GRY 1 9 4 W t 10 10 RII4 100 zz WHT GRN o VVV AC POWER 5 pLe w 1 10 0 Maaru y _ acUl INC V1 S u a A M L t 6 4 toLnA c U r Q I j _ 1 rv 1 Po 1 I J 7 PO wER S JPP _ AS ...

Page 256: ...0 i l IN HLL FUSE IN tORCONl BUSS MilL 2 A OPTIONAL BUSS M DL IA LINE V 5 100 INS TALL LPoSEL FuSE RA ING BflO A C PLU ORI NT TO READ WI1H fUSE PUL M P 1 4802 74 0 OCt Ei OU ING W 2 SOC KE T E 1I73 c P W6 lUSE OOL C OOili 5 W 7 SOCKET a iO 18 AWG AW6 lUSE TOOL QOI2 4 z 5e aGI OUNTIN BIIACI E lU II l GR J wl n IB R N ul O COM sue ASsy N J 0 Jl Ul 1 11 N HA5 JUMPERS AS S OWN PlU5 TAP EXI5T1tJCa 3 I ...

Page 257: ...e board Test leads can also be attached to the connector leads for ease in examining bus signals and I O signals This board contains no active components Exposure of MRC l cards outside the protected RF chassis environment via the extender card may cause the unit to be susceptible to RF effects EXTENDER BOARD 20B2724 24 Aug 1979 1 ...

Page 258: ...220 AS QD 32 505S1 s 3 C OAO lEe TO 11 MAl 2 A 1 113 3 TI 3090180 Eo Poe 80 P D MAT 51B555 1 REV 1I c 1 341 9G8 I E XTE JJD R BC iF O M 1I20P272 1 92 04 3 18 Of DESCRIPTION REF DES SlOel NO ITEM NO j PvAMOSELEY ASSOCIATES INC I J Q C I a Y 9 oU SAN _A U IIO ICiH P IUC V Jl LI CO If U CA fO HIII non o 11 2 J q II J z COMPONENT LAYOUT QQ JJ c EXTENDER BOARD H jll M t 1_ a Q 10 1 f lT I J 0 i ij ftiA...

Page 259: ...0 IN41S4 2SV 4NS SI OOlS 010 IlN4140A 10V IW Sl AIAt 010 llN4145A IbV lW 5l AIAV 010 1002 200V lA SI OO 9 010 lSD l 3 1V Xl NS2N2924lfS 2WlbOM02SV IA1P xl NP2N30S1 05W100M080V 1A XT PP2N4031 01WObOMObOV01A xr NP2N5Z9j 3bW800K080V04A lM 3Z981 RGllR PlM3Z98l 6 9V 30MA TQ9Z lM1401 lZ 181Z RGlIR PlM34011Z 181Z M 18llZACP RGlTR PM 18l12 llV O IA 1092 M 19105 ACP I C NHC19LOS OSV O IA T092 HC19LIZ RGlTR...

Page 260: ...OR EA 1 0 1 1l 3660B5 2141 SNHLS JON I SN14lS ON 51 81N NAND 2 EA 61 1 14 366014 214 J SN14LS86N I SN14LS06N QU liN EXCl OR 2 EA 1 19 3 58 3660150 214 SN14LSIOlAN I SN14LSI01AN DU JK HAS SL EA 2 6 2 b1 lb60168 2143 SN14l S123N I SN14LSI2lN DURETRHONOHtJLfl EA 2 01t 2 UR 1660116 214 SNHL S I 32N I SN14lS1J2N QU 21N NANO Sf EA 1 89 1 1 9 3660192 214 SN14LSI1RN IC SN14lSIl6N 6LINEDECDEHUX fA 1 9b 1 1...

Page 261: ...T Il 308 IC Tll 308 OISP 1 SEG lOP 2 EA l4 11 46 4 3110019 1911 HC6801P I HC6801P MICROPROCESSOR EA 23 90 13 90 H 1001 1911 HC6621 P I C HC 6811 P P IA INTERfACE 1 EA 14 10 19 40 31100 5 2911 MC6616P IC HC6818P PRIOR INTERRUPT fA 31 65 lI 1I5 3110043 2912 MC6050P IC HC6650P ACIA INTERfACE EA 13 6J 11 81 3110016 2912 HM53101N IC HH53101 OSC lEXPll DIV EA 90 90 3110225 2912 H512114lP 3 IC H5l2114lP ...

Page 262: ...TV UNII TUTAL I HH NO LOCA PART NUMBER DESCRIPTION PER UH SAlES PRICE SALES PRICE J 110111 Z14Z flL IlZ IC Til liZ OPTOCOUPlER fA 1 89 1 119 3110819 Z142 lIR 220bCP IC lIR 2Z06CP VCO WAVE GEN EA 11 13 11 1 31108Z 1 2142 lIR 22 IICP Ie XR 2ZIICP fSK OOEH EA 13 0 1 J JO 31 0868 214Z HOC 8010 IC HOC 8030 OPflCAl ISOLA HlR 4 EA l 63 10 52 3130816 2113 nOllA IC OUAL OP AMP EA 5 60 5 60 TOT At PR ICE 45...

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