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Fig.3.1.1 Byte Structure of Instructions
IN STRUC TION S
Addressing mode
3. INSTRUCTIONS
3.1 Addressing Mode
The 740 Family has 19 addressing modes and a powerful memory access capability. When
extracting data required for arithmetic and logic operations from memory or when storing the
results of such operations in memory, a memory address must be specified. The specification
of the memory address is called addressing. The data required for addressing and the
registers involved are described below. The 740 Family instructions can be classified into three
kinds, by the number of bytes required in program memory for the instruction: 1-byte, 2-byte
and 3-byte instructions. In each case, the first byte is known as the “Op-Code (operation
code)” which forms the basis of the instruction. The second or third byte is called the “oper-
and” which affects the addressing. The contents of index registers X and Y can also effect the
addressing.
Although there are many addressing modes, there is always a particular memory location
specified. What differs is whether the operand, or the index register contents, or a combination
of both should be used to specify the memory or jump destination. Based on these 3 types
of instructions, the range of variation is increased and operation is enhanced by combinations
of the bit operation instructions, jump instruction, and arithmetic instructions.
As for 1-byte instruction, an accumulator or a register is specified, so that the instruction does
not have “operand,” which specify memory.
AAAAA
AAAAA
Op-Code
Operand I
Operand II
3-byte instruction
Index Register
AAAAA
AAAAA
Op-Code
1-byte instruction
AAAAA
AAAAA
Op-Code
Operand I
2-byte instruction
X
Y
Y
