84
SBC
SBC
S
U
B
TRACT WITH
C
ARRY
When (T) = 0, (A)
←
(A) – (M) – (C)
(T) = 1, (M(X))
←
(M(X)) – (M) – (C)
When T = 0, this instruction subtracts the value of M and the
complement of C from A, and stores the results in A and C.
When T = 1, the instruction subtracts the contents of M and
the complement of C from the contents of M(X), and stores the
results in M(X) and C.
A remain unchanged, but status flag are changed.
M(X) represents the contents of memory where is indicated by
X.
N is 1 when bit 7 is 1 after the operation; otherwise N is
0.
V is 1 when the operation result e127 or –128;
otherwise V is 0.
No change
No change
No change
No change
Z is 1 when the operation result is 0; otherwise Z is 0.
C is 1 when the subtracted result is equal to or greater
than 0; otherwise C is 0.
Op e r a t io n :
F u n c t io n :
St a t u s fla g :
N :
V :
T :
B :
I :
D :
Z :
C :
Cycle number
2
3
4
4
5
5
6
6
Byte number
2
2
2
3
3
3
2
2
Machine codes
E9
16
, nn
16
E5
16
, zz
16
F5
16
, zz
16
ED
16
, ll
16
, hh
16
FD
16
, ll
16
, hh
16
F9
16
, ll
16
, hh
16
E1
16
, zz
16
F1
16
, zz
16
Statement
∆
SBC
∆
#$nn
∆
SBC
∆
$zz
∆
SBC
∆
$zz,X
∆
SBC
∆
$hhll
∆
SBC
∆
$hhll,X
∆
SBC
∆
$hhll,Y
∆
SBC
∆
($zz,X)
∆
SBC
∆
($zz),Y
Addressing mode
Immediate
Zero page
Zero page X
Absolute
Absolute X
Absolute Y
(Indirect X)
(Indirect Y)
Notes 1: When T=1, add 3 to the cycle number.
2: When SBC instruction is executed in the decimal operation mode
(D = 1), decision of C is delayed. Accordingly, do not execute the
instruction which operates C such as SEC, CLC, etc.
