8.1 EJTAG on-chip debug unit
Programming the MIPS32® 74K™ Core Family, Revision 02.14
106
•
dseg: is the whole debug-mode-only memory area.
It’s possible for debug-mode software to read the “kseg2”-mapped locations “underneath” by setting
Debug[LSNM]
(see
•
dmseg: is the memory region where reads and writes are implemented by the probe. But if no active probe is
plugged in, or if
DCR[PE]
is clear, then accesses here cause reads and writes to be handled like regular “kseg3”
accesses.
•
drseg: is where the debug unit’s main register banks are accessed. Accesses to “drseg” don’t go off core. Regis-
ters in “drseg” are word-wide, and should be accessed only with 32-bit word-wide loads and stores.
•
fast-talk: is a corner of “dmseg” where probe-mapped reads and writes use a more JTAG-efficient block-mode
probe protocol, reducing the amount of JTAG traffic and allowing for faster data transfer. There’s no details about
how it’s done in this document, see
.
•
debug entry: is the debug exception entry point. Because it lies in “dmseg”, the debug code can be implemented
wholly in probe memory, allowing you to debug a system which has no physical memory reserved for debug.
•
TCB Registers : These are the PDtrace EJTag Registers. They are physically located in the PDtrace unit, and
managed by the PDtrace unit. For software to access the on-chip trace memory, these registers are mapped to
drseg.
8.1.6 EJTAG CP0 registers, particularly Debug
In normal circumstances (specifically, when not in debug mode), the only software-visible part of the debug unit is its
set of three CP0 registers:
•
Debug
which has configuration and control bits, and is detailed below;
•
DEPC
keeps the restart address from the last debug exception (automatically used by the
deret
instruction);
•
DESAVE
is a CP0 register which is just 32-bits of read/write space. It’s available for a debug exception handler
which needs to save the value of a first general-purpose register, so that it can use that register as an address base
to save all the others.
Debug
is the most complicated and interesting. It has so many fields defined that we’ve taken them in three groups:
debug exception cause bits in
, information about regular exceptions which want to happen but can’t
because you’re in debug mode in
, and everything else. The "everything else" category includes the most
important fields and comes first, in
.
Summary of Contents for MIPS32 74K Series
Page 1: ...Document Number MD00541 Revision 02 14 March 30 2011 Programming the MIPS32 74K Core Family...
Page 10: ...Programming the MIPS32 74K Core Family Revision 02 14 10...
Page 54: ...3 8 The TLB and translation Programming the MIPS32 74K Core Family Revision 02 14 54...
Page 83: ......
Page 101: ...The MIPS32 DSP ASE 101 Programming the MIPS32 74K Core Family Revision 02 14...
Page 134: ...8 4 Performance counters Programming the MIPS32 74K Core Family Revision 02 14 134...