miriac SBC-S32G-R3_User Manual
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© MicroSys Electronics GmbH 2021
5
System Core, Boot Configuration
and On-Board Memory
5.1
S32G274A Processor
The S32G274A is a high-performance vehicle network processor based on Arm
Cortex-M7 and Cortex-A53 technology.
- Cluster 0: Dual ARM Cortex-A53
- Cluster 1: Dual ARM Cortex-A53
- L1 cache: 32KB I-cache / 32 KB D-cache per Cortex-A53
- L2 cache: 512 KB per cluster
- Maximum frequency: 1 GHz
For real-time and safety:
- 3x dual-core Arm Cortex-M7 (lockstep)
- L1 cache: 32KB I-cache / 32 KB D-cache per Cortex-M7
5.2
Reset Structure
Figure 5-1 Reset Structure (Carrier CRX-S32G-R3)
