System Core, Boot Configuration and On-Board Memory 5
miriac SBC-LX2160A User Manual
V 1.6
29/71
© MicroSys Electronics GmbH 2021
5.4
Boot Configuration
The SBC-LX2160A board offers three possible boot devices. The boot source set-
tings can be adjusted via SW5 (see chapter 7 for details).
SW5 configures
the signals “BOOT
-
SRC_0” to “BOOT
-SRC_3
”
which have a de-
fault high state (10k pullups are on the module) when open or SW5 is switched off.
SW5 pulls these signals to ground.
For details on bootsource selecetion refer to “
miriac_MPX-
LX2160A_User_Manual
.pdf” chapter 4.9.
5.5
I²C Bus Topology and Addresses
The SBC-LX2160A offers
two independent I²C busses.
The following tables show the I²C addresses (7 Bit). The trailing R/W bit is always
denoted as
“
x
”
.
5.5.1 I2C-1
I²C Bus 1 carrier level devices (7-Bit address):
Address
Device
Function
1111 111x
MAX9611AUB
Current monitor J11
1101 001x
MAX
GPIO-Expander J26
1101 100x
MAX
GPIO-Expander J50
1100 000x
TLC59116IRHBR
RGB LED Driver J49 Slave Address
1101 000x
LED All Call Address
1101 011x
Software Reset Address
0101 111x
EMC2301-1-ACZL
FAN controller J52
Table 5-2 I²C1 bus map
The I²C Bus 1 has the following layout, including devices on the MPX-LX2160 SoM
(LVTTL 3.3V):
Device
SCL
(Signal Name)
Pin
SDA
(Signal Name)
Pin
LX2160A
IIC1_SCL
F5
IIC1_SDA
G5
↓
↕
MACHXO3 J2
SCL
A9
SDA
C9
NTSX2102 J22
SCL
6
SDA
7
LTC4311 J58
SCL
4
SDA
6
SA56004ADP J59
SCL
8
SDA
7
SA56004CDP J61
SCL
8
SDA
7
SA56004EDP J62
SCL
8
SDA
7
NTSX2102 J63
SCL
7
SDA
6
PCF85063 J64
SCL
6
SDA
5
CAT24C128 J66
SCL
6
SDA
5
CAT24C128 J67
SCL
6
SDA
5
