...........continued
I/O LINE
Function
I/O LINE
Function
PA6/MOSI2
SPI2_MOSI (XPLAIN)
PA22/DP
DUSB_P (USB Device Diff
Positive)
PA7/XIN32
XIN32
PA23/TIOA1
PWM (mikroBUS)
PA8/XOUT32
XOUT32
PA24
PL_CD
PA9/WKUP6
INT (mikroBUS)
PA25
PL_NRST
PA10
RST (mikroBUS)
PA26
PL_EXTIN
PA11/NPCS05
SPI5_NPCS0 (mikroBUS)
PA27/MISO7
PL_MISO
PA12/MISO5
SPI5_MISO (mikroBUS)
PA28/MOSI7
PL_MOSI
PA13/MOSI5
SPI5_MOSI (mikroBUS)
PA29/SPCK7
PL_SPCK
PA14/SPCK5
SPI5_SPCK (mikroBUS)
PA30/NPCS07
PL_NPCS0
PA15/SPCK2
SPI2_SPCK (XPLAIN)
PA31
PA31(UserLed0)
Table 3-15. Pinout of PL485 PortB in PL485-EK Board
I/O LINE
Function
I/O LINE
Function
PB0/TXD6
UART_TX (XPLAIN)
PB8/TXD4/XOUT
UART_TX (mikroBUS)
PB1/RXD6
UART_RX (XPLAIN)
PB9/RXD4/XIN
UART_RX (mikroBUS)
PB2/TWCK1
I2C_SCL (mikroBUS)
PB10/TXD4
DBGU_TX / GPIO1
(XPLAIN)
PB3/TWD1
I2C_SDA (mikroBUS)
PB11/RXD4
DBGU_RX / GPIO2
(XPLAIN)
PB4/TDI
TDI
PB12/ERASE
ERASE
PB5/TDO/TRACESWO
TDO/TRACESWO
PB13
PL_LDO_ENABLE
PB6/TMS/SWDIO
TMS/SDWIO
PB14
GPIO (XPLAIN) / Check
VCC
PB7/TCK/SWCLK
TCK/SWCLK
PB15
PL_TST
For a further description of the PL485 device see the corresponding
The PL485 requires an external circuit to couple the PLC signal to the transmission line. Microchip provides highly
efficient and reduced BOM reference designs for the different coupling options, targeting common configurations in
all PLC bands (<500 kHz) complying with existing regulations and PLC communication protocols.
PL485-EK
PL485-EK Board
©
2020 Microchip Technology Inc.
User Guide
DS50002954B-page 14