HV7351
ULTRASOUND TX BEAMFORMER
EVALUATION BOARD USER’S GUIDE
2015 Microchip Technology Inc.
DS50002375A-page 19
Chapter 3. Printed Circuit Board Layout Techniques
The large thermal pad at the bottom of the HV7351 package is internally connected to
the IC’s substrate (V
SUB
). This thermal pad should be connected to 0V or GND
externally on the PCB. The designer needs to pay attention to the connecting traces on
the outputs TX1 - TX8, specifically the high-voltage and high-speed traces. In
particular, controlled impedance to ground plane and more trace spacing needs to be
applied in such situations.
High-speed PCB trace design practices that are compatible with about
50 MHz to 100 MHz operating speeds are used for the HV7351 PCB layout. The
internal circuitry of the HV7351 can operate at rather high frequencies, the primary
speed limitation being the load capacitance.
Because of the high-speed and high-transient currents that result when driving
capacitive loads, the supply-voltage bypass capacitors should be as close to the pins
as possible. The GND pin should have low inductance feed-through via connections
that are soldered directly to a solid ground plane.
The device’s V
LL
, AV
DD
, DV
DD
, PV
DD
, PV
SS
, V
PP
, V
NN
, V
PF
, V
NF
and V
RN
voltage
supplies and bypass capacitors pins must have a ceramic capacitor per pin and be
placed close to the pin. A ceramic capacitor of 1.0 µF may be used. Only the V
PP
and
V
NN
to GND capacitors need to be high-voltage type. The V
PF
to V
PP
and V
NF
to V
NN
capacitors can be low-voltage.
It is advisable to minimize the trace length to the ground plane and to insert a ferrite
bead in the power supply lead to the capacitor to prevent resonance within the power
supply lines. For applications that are sensitive to jitter and noise, and when using
multiple HV7351 ICs, another ferrite bead between each of the chip’s supply line should
be inserted.
To reduce inductance, special attention should be paid to minimizing trace lengths and
using sufficient trace width. Surface mount components are highly recommended.
Since the output impedance of the HV7351 high-voltage power stages is very low, in
some cases it may be desirable to add a small value resistor in series with the output
TX1 - TX8. This results in obtaining better waveform integrity at the load terminals after
long cables and will also reduce the output voltage slew rate at the terminals of a
capacitive load.
Special attention should be paid to the parasitic coupling from the outputs to the input
signal terminals of the HV7351. This feedback may cause oscillations or spurious
waveform shapes on the edges of signal transitions. Since the input operates with
signals down to 3.3V, even small coupling voltages may cause problems. The use of a
solid ground plane and good power and signal layout practices will prevent this
problem.
It should also be ensured that the circulating ground return current from the capacitive
load cannot react with common inductance to create noise voltages in the input
circuitry.