Microchip Technology ADM00732 User Manual Download Page 53

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HV73

58DB1 and MUPB

002 Sc

matic

Layouts



2020

Micr

ochip T

nol
ogy
I

DS500029

51A page-53

A.5

MUPB002 SCHEMATIC – FPGA

3V3_VDD

GND_D

Default config set to Master Serial M[1:0] =

GND_D

PROG_B

3V3_VDD

GND_D

PROGB_IN

FPGA_DONE

3V3_VDD

BSS123

FPGA_DONE

GND_D

GREEN

LD1

330R

0603

R12

FPGA_DONE

INIT_B

3V3_VDD

GND_D

"DONE" LED

MOSI

MISO

SOFT_RST

CLK0_P

CLK0_N

IO_0_P

IO_0_N

IO_1_P

IO_1_N

IO_2_P

IO_2_N

IO_3_P

IO_3_N

IO_4_P

IO_4_N

IO_5_P

IO_5_N

IO_6_P

IO_6_N

IO_7_P

IO_7_N

CLK1_P

CLK1_N

IO_8_P

IO_8_N

IO_10_P

IO_10_N

IO_9_P

IO_9_N

IO_11_P
IO_11_N

IO_12_P

IO_12_N

IO_13_P
IO_13_N

IO_14_P

IO_14_N

IO_32_P
IO_32_N

IO_35

GP4

GP7

FPGA power.SchDoc

CTRL_OEC

CTRL_OED

CTRL_OEB

CTRL_SCK

CTRL_CSB

SDO

CTRL_SDI

SMA Female

GND_D

SMA Female

GND_D

OUT1

OUT2

OUT1

OUT2

OUT1

OUT2

IO_17_P

IO_17_N

IO_19_P

IO_19_N

IO_20_P

IO_20_N

IO_21_P

IO_21_N

IO_36_N

40MHz_N

40MHz_P

IO_36_P

IO_37_N
IO_37_P

IO_38_N
IO_38_P

IO_39_N
IO_39_P

IO_40_N
IO_40_P

IO_41_N
IO_41_P

IO_42_N
IO_42_P

IO_43_N
IO_43_P

IO_44_N
IO_44_P

IO_45

IO_46

SCLK

22R

0402

R10

22R

0402

R11

22R

0402

R14

22R

0402

R15

4.7k

0402

FPGA_TDO
FPGA_TMS

FPGA_TCK
FPGA_TDI

CTRL_OEB

CTRL_OED

CTRL_OEC

CTRL_SDI
CTRL_CSB

CTRL_SCK

SDO

FPGA_SCK

FLASH_CS

FPGA_FLASH_CS

FPGA_COMMAND_CS

GP3

22R

R63

22R

R64

GREEN

LD2

GREEN

LD3

3V3_VDD

TP LOOP Silver

TP24

TP LOOP Silver

TP23

TP LOOP Silver

TP21

TP LOOP Silver

TP22

HDR-2 MM Male 2x7

GND_D

FPGA_TMS

FPGA_TCK

FPGA_TDO

FPGA_TDI

ClassName: JTAG

TACT SPST

SW2

330R

0603

4.7k

0402

330R

0603

330R

0603

3V3_VDD

IO_0_P

IO_0_N

IO_1_N

IO_1_P

IO_2_P

IO_2_N

IO_3_P

IO_3_N

IO_4_P

IO_4_N

IO_5_P

IO_5_N

IO_6_P

IO_6_N

IO_7_P

IO_7_N

IO_8_P

IO_8_N

IO_9_P

IO_9_N

IO_10_P

IO_10_N

IO_11_P

IO_11_N

IO_12_P

IO_12_N

IO_13_P

IO_13_N

IO_14_P

IO_14_N

IO_31_P

IO_31_N

IO_32_P

IO_32_N

IO_35

CLK0_P
CLK0_N

CLK1_P
CLK1_N

IO_17_P

IO_17_N

IO_19_P

IO_19_N

IO_20_N

IO_20_P

IO_21_P

IO_21_N

IO_36_P

IO_36_N

IO_37_P

IO_37_N

IO_38_P

IO_38_N

IO_39_P

IO_39_N

IO_40_P

IO_40_N

IO_41_P

IO_41_N

IO_42_P

IO_42_N

IO_43_P

IO_43_N

IO_44_P

IO_44_N

IO_45

IO_46

ClassName: BANK0_REGION_TL

ClassName: BANK1_REGION_RB

ClassName: BANK3_REGION_LB

TP21
TP22

TP21

TP22

TP24

TP23

TP24

IO_31_P
IO_31_N

CCAUX

ANK 0

IO_L1P_HSWAPEN_0

IO_L1N_VREF_0

IO_L2P_0

IO_L2N_0

IO_L3P_0

IO_L3N_0

IO_L4P_0

IO_L4N_0

IO_L5P_0

IO_L5N_0

IO_L6P_0

IO_L6N_0

IO_L7P_0

IO_L7N_0

IO_L33P_0

IO_L33N_0

IO_L34P_GCLK19_0

IO_L34N_GCLK18_0

IO_L35P_GCLK17_0

B10

IO_L35N_GCLK16_0

A10

IO_L36P_GCLK15_0

IO_L36N_GCLK14_0

IO_L37P_GCLK13_0

E10

IO_L37N_GCLK12_0

C10

IO_L38P_0

IO_L38N_VREF_0

IO_L39P_0

C11

IO_L39N_0

A11

IO_L40P_0

IO_L40N_0

IO_L62P_0

B12

IO_L62N_VREF_0

A12

IO_L63P_SCP7_0

C13

IO_L63N_SCP6_0

A13

IO_L64P_SCP5_0

F10

IO_L64N_SCP4_0

E11

IO_L65P_SCP3_0

B14

IO_L65N_SCP2_0

A14

IO_L66P_SCP1_0

D11

IO_L66N_SCP0_0

D12

XC6SLX25-2FTG256C

U1A

NK 1

IO_L1P_A25_1

E13

IO_L1N_A24_VREF_1

E12

IO_L29P_A23_M1A13_1

B15

IO_L29N_A22_M1A14_1

B16

IO_L30P_A21_M1RESET_1

F12

IO_L30N_A20_M1A11_1

G11

IO_L31P_A19_M1CKE_1

D14

IO_L31N_A18_M1A12_1

D16

IO_L32P_A17_M1A8_1

F13

IO_L32N_A16_M1A9_1

F14

IO_L33P_A15_M1A10_1

C15

IO_L33N_A14_M1A4_1

C16

IO_L34P_A13_M1WE_1

E15

IO_L34N_A12_M1BA2_1

E16

IO_L35P_A11_M1A7_1

F15

IO_L35N_A10_M1A2_1

F16

IO_L36P_A9_M1BA0_1

G14

IO_L36N_A8_M1BA1_1

G16

IO_L37P_A7_M1A0_1

H15

IO_L37N_A6_M1A1_1

H16

IO_L38P_A5_M1CLK_1

G12

IO_L38N_A4_M1CLKN_1

H11

IO_L39P_M1A3_1

H13

IO_L39N_M1ODT_1

H14

IO_L40P_GCLK11_M1A5_1

J11

IO_L40N_GCLK10_M1A6_1

J12

IO_L41P_GCLK9_IRDY1_M1RASN_1

J13

IO_L41N_GCLK8_M1CASN_1

K14

IO_L42P_GCLK7_M1UDM_1

K12

IO_L42N_GCLK6_TRDY1_M1LDM_1

K11

IO_L43P_GCLK5_M1DQ4_1

J14

IO_L43N_GCLK4_M1DQ5_1

J16

IO_L44P_A3_M1DQ6_1

K15

IO_L44N_A2_M1DQ7_1

K16

IO_L45P_A1_M1LDQS_1

N14

IO_L45N_A0_M1LDQSN_1

N16

IO_L46P_FCS_B_M1DQ2_1

M15

IO_L46N_FOE_B_M1DQ3_1

M16

IO_L47P_FWE_B_M1DQ0_1

L14

IO_L47N_LDC_M1DQ1_1

L16

IO_L48P_HDC_M1DQ8_1

P15

IO_L48N_M1DQ9_1

P16

IO_L49P_M1DQ10_1

R15

IO_L49N_M1DQ11_1

R16

IO_L50P_M1UDQS_1

R14

IO_L50N_M1UDQSN_1

T15

IO_L51P_M1DQ12_1

T14

IO_L51N_M1DQ13_1

T13

IO_L52P_M1DQ14_1

R12

IO_L52N_M1DQ15_1

T12

IO_L53P_1

L12

IO_L53N_VREF_1

L13

IO_L74P_AWAKE_1

M13

IO_L74N_DOUT_BUSY_1

M14

XC6SLX25-2FTG256C

U1B

NK 2

IO_L1P_CCLK_2

R11

IO_L1N_M0_CMPMISO_2

T11

IO_L2P_CMPCLK_2

M12

IO_L2N_CMPMOSI_2

M11

IO_L3P_D0_DIN_MISO_MISO1_2

P10

IO_L3N_MOSI_CSI_B_MISO0_2

T10

IO_L12P_D1_MISO2_2

N12

IO_L12N_D2_MISO3_2

P12

IO_L13P_M1_2

N11

IO_L13N_D10_2

P11

IO_L14P_D11_2

IO_L14N_D12_2

IO_L16P_2

L10

IO_L16N_VREF_2

M10

IO_L23P_2

IO_L23N_2

IO_L29P_GCLK3_2

IO_L29N_GCLK2_2

IO_L30P_GCLK1_D13_2

IO_L30N_GCLK0_USERCCLK_2

IO_L31P_GCLK31_D14_2

IO_L31N_GCLK30_D15_2

IO_L32P_GCLK29_2

IO_L32N_GCLK28_2

IO_L47P_2

IO_L47N_2

IO_L48P_D7_2

IO_L48N_RDWR_B_VREF_2

IO_L49P_D3_2

IO_L49N_D4_2

IO_L62P_D5_2

IO_L62N_D6_2

IO_L63P_2

IO_L63N_2

IO_L64P_D8_2

IO_L64N_D9_2

IO_L65P_INIT_B_2

IO_L65N_CSO_B_2

XC6SLX25-2FTG256C

U1C

BANK 3

IO_L1P_3

IO_L1N_VREF_3

IO_L2P_3

IO_L2N_3

IO_L32P_M3DQ14_3

IO_L32N_M3DQ15_3

IO_L33P_M3DQ12_3

IO_L33N_M3DQ13_3

IO_L34P_M3UDQS_3

IO_L34N_M3UDQSN_3

IO_L35P_M3DQ10_3

IO_L35N_M3DQ11_3

IO_L36P_M3DQ8_3

IO_L36N_M3DQ9_3

IO_L37P_M3DQ0_3

IO_L37N_M3DQ1_3

IO_L38P_M3DQ2_3

IO_L38N_M3DQ3_3

IO_L39P_M3LDQS_3

IO_L39N_M3LDQSN_3

IO_L40P_M3DQ6_3

IO_L40N_M3DQ7_3

IO_L41P_GCLK27_M3DQ4_3

IO_L41N_GCLK26_M3DQ5_3

IO_L42P_GCLK25_TRDY2_M3UDM_3

IO_L42N_GCLK24_M3LDM_3

IO_L43P_GCLK23_M3RASN_3

IO_L43N_GCLK22_IRDY2_M3CASN_3

IO_L44P_GCLK21_M3A5_3

IO_L44N_GCLK20_M3A6_3

IO_L45P_M3A3_3

IO_L45N_M3ODT_3

IO_L46P_M3CLK_3

IO_L46N_M3CLKN_3

IO_L47P_M3A0_3

IO_L47N_M3A1_3

IO_L48P_M3BA0_3

IO_L48N_M3BA1_3

IO_L49P_M3A7_3

IO_L49N_M3A2_3

IO_L50P_M3WE_3

IO_L50N_M3BA2_3

IO_L51P_M3A10_3

IO_L51N_M3A4_3

IO_L52P_M3A8_3

IO_L52N_M3A9_3

IO_L53P_M3CKE_3

IO_L53N_M3A12_3

IO_L54P_M3RESET_3

IO_L54N_M3A11_3

IO_L55P_M3A13_3

IO_L55N_M3A14_3

IO_L83P_3

IO_L83N_VREF_3

XC6SLX25-2FTG256C

U1D

PROGRAM_B_2

SUSPEND

P14

CMPCS_B_2

L11

DONE_2

P13

TCK

C14

TDI

C12

TMS

A15

TDO

E14

XC6SLX25-2FTG256C

U1E

GND_D

3V3_VDD

0.1uF

50V

0402

C84

GND_D

4.7k

0402

GND_D

CLOCK TERMINATION WAS REMOVED FROM THIS SCHEMATIC.
THE TERMINATION WAS ADDED TO THE USB SCHEMATIC

XC6SLX9-2FTG256I
XC6SLX9-2FTG256C - this i use

Push button to force FPGA
configuration download from
Flash

When the FPGA is loading its firmware from the SPI
Flash, the FPGA genetaes the SCLK. (The FPGA is
the SPI bus master.)

The USB to SPI bridge generates the SCLK, when it's
sending commands to the FPGA. (The FPGA is the
SPI bus slave.)

That's why SCLK is bidirectional from the FPGA's
point of view.

Summary of Contents for ADM00732

Page 1: ...2020 Microchip Technology Inc DS50002951A HV7358DB1 User s Guide...

Page 2: ...may have a right to sue for relief under that Act Trademarks The Microchip name and logo the Microchip logo Adaptec AnyRate AVR AVR logo AVR Freaks BesTime BitCloud chipKIT chipKIT logo CryptoMemory...

Page 3: ...t Includes 12 Chapter 2 HV7358 Overview 13 2 1 Getting Started 13 2 2 USB Driver Installation 13 2 3 HV7358DB1 GUI Installation 19 Chapter 3 HV7358DB1 GUI Operation 23 3 1 Getting Started 23 3 2 Setup...

Page 4: ...Silk 57 A 11 HV7358DB1 Top Copper 58 A 12 HV7358DB1 Bottom Copper 58 A 13 HV7358DB1 Bottom Copper and Silk 59 A 14 HV7358DB1 Bottom Silk 59 A 15 MUPB002 Top Silk 60 A 16 MUPB002 Top Copper and Silk 60...

Page 5: ...e HV7358 Evaluation Board Chapter 4 MUPB002 FPGA Configuration This chapter explains how to load software into the FPGA on the MPUB002 Chapter 5 PCB Design and Layout Techniques The HV7358 deals with...

Page 6: ...g A menu selection select Enable Programmer Quotes A field name in a window or dialog Save project before build Underlined italic text with right angle bracket A menu path File Save Bold characters A...

Page 7: ...re releases and archived software General Technical Support Frequently Asked Questions FAQs technical support requests online discussion groups Microchip consultant program member listing Business of...

Page 8: ...HV7358DB1 User s Guide DS50002951A page 8 2020 Microchip Technology Inc NOTES...

Page 9: ...rate the gate drive voltages required for the TX output FETs These supplies function at any VPP VNN voltage The 200 MHz clock retiming capability provides low jitter in CW PW and B mode The clock sync...

Page 10: ...120 160 or 200 MHz non PLL Built in LVDS TX clock selectable from 30 40 60 or 80 MHz PLL mode Daisy chain capable User controllable per channel beamforming delay and apodization Evaluates the RX echo...

Page 11: ...80 to 200 MHz in non PLL Mode CW Frequency Range Programmable CW Frequency from 1 MHz to 7 MHz Interface of FPGA Control Signals and USB PC GUI Software J5 and J12 Connects MUPB002 Interface Board Lo...

Page 12: ...MUPB002 contains the USB interface and an FPGA Each TX output has a 330 pf 2 5K load which requires a shorting connector to be attached without the connector the output will be open The 200 MHz clock...

Page 13: ...to determine which USB driver to install 1 Connect the USB cable from the lower male Micro B connector on the MPUB002 board to any USB connector on your PC The USB will power the board Note Do not co...

Page 14: ...HV7358DB1 User s Guide DS50002951A page 14 2020 Microchip Technology Inc FIGURE 2 1 View of Device Manager Screen FIGURE 2 2 Close up of Bridge device with Error...

Page 15: ...B1 Software Installation 2020 Microchip Technology Inc DS50002951A page 15 6 A pop up window will open as shown in Figure 2 3 below Choose Update driver and click on it FIGURE 2 3 Update driver Pop up...

Page 16: ...chnology Inc 7 After clicking on Update driver the window in Figure 2 4 will appear Choose Browse my computer for driver software FIGURE 2 4 Driver Search Window 8 The following window will open Click...

Page 17: ...t_V2 3 4 folder recently downloaded from the Microchip website and choose the Drivers sub directory Double click on Drivers FIGURE 2 6 Browse to Drivers Folder Window The window in Figure 2 7 will app...

Page 18: ...shown in Figure 2 8 will appear 11 Click the Install button FIGURE 2 8 Install Verification Screen 12 After successful installation the window shown in Figure 2 9 will appear This verifies that you h...

Page 19: ...UI program will require about 2 6 MB hard drive space 1 Double click on the file named MUPB002 HV7358 GUI Setup The window in Figure 2 10 below will pop up 2 Click Next FIGURE 2 10 HV7358 Setup Wizard...

Page 20: ...ct Installation Folder The default folder is shown A different folder may also be specified FIGURE 2 12 Installation Folder 5 The next window shown in Figure 2 13 confirms that you are ready to instal...

Page 21: ...14 Installation Window Once installation is complete the following window will appear as shown in Figure 2 15 Click on Close when the installation is complete The GUI window will disappear FIGURE 2 15...

Page 22: ...HV7358DB1 User s Guide DS50002951A page 22 2020 Microchip Technology Inc NOTES...

Page 23: ...MPUB002 board to J5 and J12 of the HV7358DB1 2 Connect a USB cable from the lower male Micro B connector J7 on the MPUB002 board to any USB connector on your PC 3 Install jumpers J6 J14 J15 J16 and J...

Page 24: ...the power supplies turned off TABLE 3 2 J10 POWER SUPPLY CONNECTION INFORMATION The power up and down sequencing is shown in Table 3 3 below TABLE 3 3 POWER UP DOWN SEQUENCE Terminal Rail Name Voltage...

Page 25: ...ottom left hand corner there should be the USB Status Connected note as shown in Figure 3 2 below FIGURE 3 2 USB Status Note When the MUPB002 board is connected to the PC or when the GUI is started th...

Page 26: ...e 3 5 3 4 1 1 EN ENABLE PIN The HV7358 Enable pin sets all TX outputs to High Z TABLE 3 4 ENABLE SIGNAL 3 4 1 2 BEN BUFFER ENABLE PIN BFEN is an input logic pin that can disable the LVDS pins used to...

Page 27: ...PEN or PLLEN bit in the I2 C register actually controls the PLL TABLE 3 8 PEN LOGIC 3 4 1 6 SET BUTTON Sends the selected data to the HV7358 data input pins Select the signals appropriate for your app...

Page 28: ...PP 55V and VNN 55V were entered in Figure 3 6 These values will be used to calculate the power dissipation Enter the VPP and VNN values FIGURE 3 6 VPP and VNN Voltage Window 3 4 3 Mode and Power Calcu...

Page 29: ...Figure 3 8 If the PLL mode is on PEN 1 the external frequency choices are 30 MHz 40 MHz 60 MHz or 80 MHz They are shown on the right side of Figure 3 8 When in PLL mode the frequency selections are on...

Page 30: ...nges the current settings FIGURE 3 9 I2C Read Write Box 3 4 6 Line Duration Cycles and TXRW Low Time The Line Duration and TXRW Low Time entry box is shown in Figure 3 10 Line Duration LD is the time...

Page 31: ...delay time on a per TXx basis TGW Sets the maximum TX Global Pulse Width PW It does this by setting the number of FC time periods that the pulse remains high The actual TGW is a 9 bit binary word The...

Page 32: ...gnal that applies to every TX channel TABLE 3 9 TX CURRENT LIMIT SETTING 3 4 8 2 CWOC BIT CWOC is the I2 C control bit that determines the CW output RON selection TABLE 3 10 CWOC RON 3 4 8 3 CWFD 7 0...

Page 33: ...PSEL is the I2 C bit that determines if PLLEN or PEN controls the PLL enable TABLE 3 13 PSEL EFFECT TABLE 3 12 TRDLY D4 D3 D2 D1 D0 Decimal K 0 0 0 0 0 0 1 0 0 0 0 1 1 8 0 0 0 1 0 2 12 0 0 0 1 1 3 16...

Page 34: ...t all 16 channels TABLE 3 16 EOT 3 4 8 10 BSEL BIT BSEL is the I2 C bit that determines if BFEN or BEN controls the output buffer enable TABLE 3 17 BSEL 3 4 8 11 SPISEL BIT SPISEL determines which sig...

Page 35: ...BSEL 1 TABLE 3 19 BFEN FOR BSEL 1 3 4 8 15 EOTC BIT Determines when the RTZ and TRSW delay starts If EOTC 0 the period starts immediately after all channels are finished If EOTC 1 the period starts a...

Page 36: ...the first pulse will be negative This is a global control bit It will be the same for each TX channel and each waveform Delay Each channel can have its own unique delay The starting point is TGW whic...

Page 37: ...Individual Pulse Width Control 3 5 RUNNING THE HV7358DB1 1 Connect the scope probes to the appropriate signals 2 Turn on the power supplies observing the power up sequence in Table 3 3 3 Click on the...

Page 38: ...User s Guide DS50002951A page 38 2020 Microchip Technology Inc 3 7 SAMPLE WAVEFORM A sample of the waveform generation is shown in Figure 3 15 FIGURE 3 15 Sample Waveform from Multiple Channels of th...

Page 39: ...op_main bit available from the Microchip website Flash memory configuration file HV7358_BVLDS_TRIG mcs available from the Microchip website 4 3 SETUP PROCEDURE This procedure explains how to reconfigu...

Page 40: ...n the iMPACT icon See Figure 4 1 FIGURE 4 1 iMPACT Icon 2 The window in Figure 4 2 will appear 3 Left click on Boundary Scan as shown in Figure 4 2 4 Right click on top of the Right click to Add Devic...

Page 41: ...he file hv7358_top_main bit Then click on the Open button FIGURE 4 4 Assign New FPGA Configuration File Selection The window in Figure 4 5 will appear Only the upper right corner of the window is show...

Page 42: ...sh box FIGURE 4 6 Add SPI BPI Flash Box The box in Figure 4 7 will appear 9 Browse to the file named HV7358_BLVDS_TRIG mcs 10 Click on the Open button FIGURE 4 7 SPI BPI File Choice The window in Figu...

Page 43: ...page 43 Figure 4 9 shows the upper left part of the next window 13 There is a FLASH button in the upper right Click on it FIGURE 4 9 FLASH Button The FLASH button will turn green as shown in Figure 4...

Page 44: ...evice Programming Properties window shown in Figure 4 11 will appear 15 Click the OK button FIGURE 4 11 Device Programming Properties Window The FPGA will be programmed This may take over a minute Whe...

Page 45: ...y Inc DS50002951A page 45 4 5 CONCLUSION A procedure to program the MUPB002 FPGA for use with the HV7358DB1 has been presented This procedure with different file names can be used to program the MUPB0...

Page 46: ...HV7358DB1 User s Guide DS50002951A page 46 2020 Microchip Technology Inc NOTES...

Page 47: ...358 TX outputs to digital input signals may cause error signals on the logic input pins Adequate spacing and possible isolation are required Additional width is required for the high current traces 5...

Page 48: ...to the GND pin on the HV7358 This path also needs to be as short as possible There are also high current spikes from the VPP and VNN supplies to the HV7358 TX outputs Use the same design rules with TX...

Page 49: ...gram MUPB002 Schematic Demo Board Connectors MUPB002 Schematic FPGA MUPB002 Schematic SPI Flash for FPGA Configuration MUPB002 Schematic Programmable Clock MUPB002 Schematic FPGA Decoupling Capacitors...

Page 50: ...2 6 7 4 1 8 5 U4 AD8099 TP12 C91 R25 INF DNP A0 D1 A1 D2 A2 D3 BEN N3 CKON T1 CKOP R1 CLKN B1 CSN B3 CSON T3 CSOP R3 CSP A3 CW J2 DISC K2 DNC1 R6 DNC3 C8 DNC4 D8 DNC5 E8 DNC6 F8 DNC7 L8 EN K3 ETI R4 E...

Page 51: ...IO_32_N IO_32_P IO_35 IO_19_N IO_20_N IO_17_P IO_19_P IO_17_N IO_21_P IO_20_P IO_21_N IO_37_P IO_36_P IO_40_N IO_39_N IO_40_P IO_37_N IO_38_N IO_39_P IO_38_P IO_36_N IO_44_P IO_44_N IO_46 IO_45 IO_43...

Page 52: ...CLK5 CLK3_P CLK3_N A1 B1 BG1 A2 B2 BG2 A3 B3 BG3 A4 B4 BG5 A5 B5 BG4 A6 B6 BG6 A7 B7 BG7 A8 B8 BG8 A9 B9 BG9 A10 B10 BG10 C1 D1 DG1 C2 D2 DG2 C3 D3 DG3 C4 D4 DG4 C5 D5 DG5 C6 D6 DG6 C7 D7 DG7 C8 D8 DG...

Page 53: ...M1A7_1 F15 IO_L35N_A10_M1A2_1 F16 IO_L36P_A9_M1BA0_1 G14 IO_L36N_A8_M1BA1_1 G16 IO_L37P_A7_M1A0_1 H15 IO_L37N_A6_M1A1_1 H16 IO_L38P_A5_M1CLK_1 G12 IO_L38N_A4_M1CLKN_1 H11 IO_L39P_M1A3_1 H13 IO_L39N_M1...

Page 54: ...FL127SABMFI101 U15 3V3_VDD GND_D 3V3_VDD 3V3_VDD GND_D 3V3_VDD GND_D 1 1 2 HDR 2 54 Male 1x2 JP2 Write protect jumper GND_D 3V3_VDD 2 43k 0402 1 R62 10k 0402 1 R65 10k 0402 1 R66 0 1 F 50V 0402 C138 1...

Page 55: ...D_EEPROM_CS 1k 0402 1 R18 1k 0402 1 R16 12k 0402 1 R54 4 7k 0402 1 R51 0 1 F 50V 0402 C80 0 1 F 50V 0402 C103 0 1 F 50V 0402 C104 0 1 F 50V 0402 C106 0 1 F 50V 0402 C79 0 1 F 50V 0402 C114 0 1 F 50V 0...

Page 56: ...02 1 R30 10k 0603 1 R22 10k 0603 1 R28 10k 0603 1 R29 390R 0603 5 R27 51k 0603 1 R25 19 1k 0603 1 R17 69 8k 0603 1 R26 VIN 1 VIN 2 SHDN 3 GND 4 PWRGD 5 CDELAY 6 ADJ 7 VOUT 8 EP 9 U6 MCP172X ADJ DFN 8...

Page 57: ...HV7358DB1 and MUPB002 Schematics and Layouts 2020 Microchip Technology Inc DS50002951A page 57 A 9 HV7358DB1 TOP SILK A 10 HV7358DB1 TOP COPPER AND SILK...

Page 58: ...HV7358DB1 User s Guide DS50002951A page 58 2020 Microchip Technology Inc A 11 HV7358DB1 TOP COPPER A 12 HV7358DB1 BOTTOM COPPER...

Page 59: ...HV7358DB1 and MUPB002 Schematics and Layouts 2020 Microchip Technology Inc DS50002951A page 59 A 13 HV7358DB1 BOTTOM COPPER AND SILK A 14 HV7358DB1 BOTTOM SILK...

Page 60: ...HV7358DB1 User s Guide DS50002951A page 60 2020 Microchip Technology Inc A 15 MUPB002 TOP SILK A 16 MUPB002 TOP COPPER AND SILK...

Page 61: ...HV7358DB1 and MUPB002 Schematics and Layouts 2020 Microchip Technology Inc DS50002951A page 61 A 17 MUPB002 TOP COPPER A 18 MUPB002 BOTTOM COPPER...

Page 62: ...HV7358DB1 User s Guide DS50002951A page 62 2020 Microchip Technology Inc A 19 MUPB002 BOTTOM COPPER AND SILK A 20 MUPB002 BOTTOM SILK...

Page 63: ...4 C29 Capacitor Ceramic 22 F 16V X7R 10 0603 TDK Corporation C1608X7R1C224K 18 C75 78 C80 81 C90 C92 C93 C100 106 C108 C110 Capacitor Ceramic 1 F 16V X5R 0402 TDK Corporation CGB2A1X5R1C105M033BC 8 C8...

Page 64: ...9V 13 R30 R69 77 R80 81 R83 Resistor 1 27 k 1 1 10W 0603 Panasonic ECG ERJ 3EKF1271V 7 R34 R65 R66 R67 R68 R79 R82 Resistor 100 1 10W 1 0402 Panasonic ECG ERJ 2RKF1000X 12 R4 R15 R20 R25 R26 R33 R43 R...

Page 65: ...0402 TDK Corporation C1005X7R1E103M 0 C48 Capacitor Ceramic 0 1 F 50V 10 X7R SMD 0402 NOT POPULATED TDK Corporation C1005X7R1H104K050BB 0 C49 Capacitor Ceramic 4 7 F 6 3V 20 X5R SMD 0402 NOT POPULATE...

Page 66: ...1x4 Tin 5 84 MH TH Vertical FCI 68002 404HLF 1 JP2 Connector Header 2 54 Male 1x2 Gold 5 84 MH TH Vertical FCI 77311 118 02LF 4 LD1 LD2 LD3 LD4 Diode LED Green 2 2V 25 mA 15 mcd Clear SMD 0603 Kingbr...

Page 67: ...0W SMD 0603 Panasonic Electronic Components ERJ 3EKF7872V 1 R54 Resistor TKF 12k 1 1 16W SMD 0402 ROHM Semiconductor MCR01MZPF1202 0 R57 R58 R69 R70 R71 Resistor TKF 10k 1 1 10W SMD 0402 NOT POPULATED...

Page 68: ...B Hub Flash USB4604 1080HN 48 Lead SQFN Microchip Technology Inc USB4604 1080HN 4 U4 U5 U6 U7 Microchip Analog LDO 0 8V 5V MCP1727T ADJE MF 8 Lead DFN Microchip Technology Inc MCP1727T ADJE MF 1 U8 Mi...

Page 69: ...ology Inc DS50002951A page 69 Appendix C HV7358DB1 Waveforms C 1 MIC2800 EVALUATION BOARD TEST WAVEFORM EXAMPLES Appendix C shows sample waveforms created with the MUPB002 and HV7358DB1 combination FI...

Page 70: ...HV7358DB1 User s Guide DS50002951A page 70 2020 Microchip Technology Inc FIGURE C 2 10 MHz VPP VNN 70V Load 330 pF 2 5K FIGURE C 3 TX Output 20 MHz 4 Cycle 17 8 V p p 330 pF 2 5K Load...

Page 71: ...HV7358DB1 Waveforms 2020 Microchip Technology Inc DS50002951A page 71 FIGURE C 4 Ch8 11 VPP VNN 80V 5 MHz with 330 pF 2 5K All Channels On FIGURE C 5 Rise Fall Time of 80V 5 MHz RTZ 330 pF 2 5K Load...

Page 72: ...HV7358DB1 User s Guide DS50002951A page 72 2020 Microchip Technology Inc FIGURE C 6 TX and RX B Mode 5 MHz 1 Cycle with 330 pF 2 5k Load FIGURE C 7 TX and RX in PW Mode 5 MHz 8 Cycle 330 pF 2 5K Load...

Page 73: ...HV7358DB1 Waveforms 2020 Microchip Technology Inc DS50002951A page 73 FIGURE C 8 4 Cycle Canceling 5 MHz 4 Cycle Canceling 5 MHz FIGURE C 9 LNAOut RX0 Signal After TX 1 Cycle 80V...

Page 74: ...HV7358DB1 User s Guide DS50002951A page 74 2020 Microchip Technology Inc NOTES...

Page 75: ...500 GUI calculated commend to FPGA See MathCAD Limitation Calculation Auto Stop Tx auto stop time sec NA 60 300 Demo Tx waveform auto off feature for safety SPI Read back from I2C TGP 0 Globle off ti...

Page 76: ...ed commend to FPGA See MathCAD Limitation Calculation Auto Stop Tx auto stop time sec NA 60 300 Demo Tx waveform auto off feature for safety SPI Read back from I2C TGP 0 Globle off time P fC Cyc 0 0 1...

Page 77: ...HV7358 GUI Parameter and Default 2020 Microchip Technology Inc DS50002951A page 77 D 3 HV7358DB1 GUI PARAMETER INITIAL VALUE AND LIMITS PAGE 3...

Page 78: ...00 China Xian Tel 86 29 8833 7252 China Xiamen Tel 86 592 2388138 China Zhuhai Tel 86 756 3210040 ASIA PACIFIC India Bangalore Tel 91 80 3090 4444 India New Delhi Tel 91 11 4160 8631 India Pune Tel 91...

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