7I76 35
REFERENCE INFORMATION
SSLBP
NORMAL MODE OPERATION
In normal mode the sequence of operations for a cyclic access with write before
read is as follows:
Note steps 1 through 5 are setup operations and are only done once per session
1. Issue STOP ALL command (0x800), wait for COMMAND register clear to verify stop
command completion.
2. Issue normal START command (0x9NN) with bitmask (NN) of channels to start.
3. Wait for COMMAND register clear to verify start command completion. (may be many
mS)
4. Read data register to verify that all selected channels started (a 1 in any channel
position bit means a fault in the channel that the bit represents)
5. Read device unit number (This can only be read before DOIT has been asserted)
6. Check command register, if not clear, cycle time is too short.
(Note the command register should never be written to when not clear except to issue a
stop command or when written with the command ignore bit set)
7. Check data register, any 1 bits indicate previous DOIT command failed for in the
corresponding channels
8. Read per channel Interface register 0 and interface register 1 for input process data
9. Write per channel output process data ( for 7I76) to interface 0 register and interface 1
register
10. Write DOIT command = 0x10NN where NN is the bit mask of channels to initiate
transfers.
11. Wait for next cycle, at next cycle time, loop back to state 6
This sequence can be modified if a read-modify-write sequence is required, this
requires polling the command register for send/receive completion. This will take a
maximum of 100 uSec from the DOIT command to command register clear and valid input
data.
