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Summary of Contents for PCI-2513

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Page 2: ...PCI 2513 User s Guide Document Revision 6 December 2010 Copyright 2010 Measurement Computing Corporation...

Page 3: ...emedies Neither Measurement Computing Corporation nor its employees shall be liable for any direct or indirect special incidental or consequential damage arising from the use of its products even if M...

Page 4: ...board for I O operations 10 Connectors and cables 10 Connector pinout 11 Cabling 11 Field wiring and signal termination 12 Installing multiple boards 12 Chapter 3 Functional Details 13 PCI 2513 block...

Page 5: ...ol outputs 30 Detection setpoint details 32 FIRSTPORTC or timer update latency 33 Chapter 4 Calibrating the PCI 2513 35 Chapter 5 Specifications 36 Analog input 36 Accuracy 36 Digital input output 37...

Page 6: ...d to the subject matter you are reading Caution Shaded caution statements present information to help you avoid injuring yourself and others damaging your hardware or losing your data bold text Bold t...

Page 7: ...alog input ranges of 10 V 5 V 2 V 1 V 0 5 V 0 2 V and 0 1V The board has 24 high speed lines of digital I O two timer outputs and four 32 bit counters It provides up to 12 MHz scanning on all digital...

Page 8: ...ompatible with the PCI 2513 are not included with PCI 2513 orders and must be ordered separately If you ordered any of the following products with your board they should be included with your shipment...

Page 9: ...ere are no switches or jumpers to set on the board Configuration is controlled by your system s BIOS Before you install the PCI 2513 Enable Bus Mastering DMA For a PCI 2513 to operate properly you mus...

Page 10: ...h as the analog input configuration 16 single ended or eight differential channels and the edge used for pacing when using an external clock Once selected any program that uses the Universal Library i...

Page 11: ...58 24 AGND ACH7 ACH7 HI 57 23 ACH15 ACH7 LO NC 56 22 N C NC 55 21 N C NEGREF reserved for self calibration 54 20 POSREF reserved for self calibration GND 53 19 5V A1 52 18 A0 A3 51 17 A2 A5 50 16 A4 A...

Page 12: ...our web site at www mccdaq com products screw_terminal_bnc aspx Installing multiple boards PCI 2513 features can be replicated up to four times as up to four boards can be installed in a single host P...

Page 13: ...e 3 PCI 2513 functional block diagram Synchronous I O mixing analog digital and counter scanning The PCI 2513 can read analog digital and counter inputs while generating digital pattern outputs at the...

Page 14: ...measured sequentially at 1 s per channel by default For example in the fastest mode with 1 s settling time for the acquisition of each channel a single analog channel can be scanned continuously at 1...

Page 15: ...eration Digital outputs can be updated asynchronously at anytime before during or after an acquisition You can use two of the 8 bit ports to generate a digital pattern at up to 12 MHz The PCI 2513 sup...

Page 16: ...ing with latencies guaranteed to be less than 1 s You can program both of the logic levels 1 or 0 and the rising or falling edge for the discrete digital trigger input Software based triggering The th...

Page 17: ...data acquisition starts when the trigger is received and the acquisition stops when the stop trigger event is received Fixed pre trigger with post trigger stop event In this mode you set the number of...

Page 18: ...synchronous read signals strobe when the lower 16 bits of the counter are read by software The software can read the counter s high 16 bits some time later after reading the lower 16 bits The full 32...

Page 19: ...annel other than the counter being gated Decrement on mode Sets the counter decrement option to on for the mapped channel The input channel for the counter increments the counter and you can use the m...

Page 20: ...debounce time setting equal to T2 for this example T2 At the end of time period T2 the input signal has transitioned high and stayed there for the required amount of time therefore the output transit...

Page 21: ...n stable for the debounce time and therefore any edge on the input after time period T6 is immediately reflected in the output of the debounce module Debounce mode comparisons Figure 9 shows how the t...

Page 22: ...al working machines packaging equipment elevators valve control systems and in a multitude of other applications in which rotary shafts are involved The encoder mode allows the PCI 2513 to make use of...

Page 23: ...as the same number of window pairs as A except that the entire pattern is rotated by 1 4 of a window pair Thus the B signal is always 90 out of phase from the A signal The A and B signals pulse 512 ti...

Page 24: ...ased on the encoder s output drive capability and the input impedance of the PCI 2513 Lower values of pull up resistors cause less distortion but also cause the encoder s output driver to pull down wi...

Page 25: ...crossings equal the number of complete revolutions This means that the data streaming to the PC is relative position period 1 velocity and revolutions A typical acquisition might take six readings of...

Page 26: ...sure that the current output spec is not violated With the encoders connected in this manner there is no relative positioning information available on encoder 1 or 2 since there is no Z signal connect...

Page 27: ...timers Setpoint configuration overview You can program each detection setpoint as one of the following Single point referenced Above below or equal to the defined setpoint Window dual point referenced...

Page 28: ...ion True and False If True then output value 1 If False then output value 2 Window hysteresis mode Above A X A Below B X B Both conditions are checked when in hysteresis mode Hysteresis mode forced up...

Page 29: ...reater than value Signal is above 16 bit low limit so 16 bit high limit is not used Less than value Signal is below 16 bit high limit so 16 bit low limit is not used Equal to value Signal is equal to...

Page 30: ...m the above table we have 10011 binary or 19 decimal derived as follows Setpoint 0 having a True state shows 1 giving us decimal 1 Setpoint 1 having a True state shows 1 giving us decimal 2 Setpoint 4...

Page 31: ...nnel 3 analog input voltage is outside the setpoint window condition False timer0 will be updated with a second output value Figure 19 Timer output update on True and False Using the hysteresis functi...

Page 32: ...s of channel 1 s 32 bit value The FIRSTPORTC digital output port could be updated on a True condition the rising edge of the detection signal Alternatively timer outputs could be updated with a value...

Page 33: ...e 22 Example of FIRSTPORTC latency By applying a setpoint on analog input channel 2 that setpoint gets evaluated every 10 s with respect to the sampled data for channel 2 Due to the pipelined architec...

Page 34: ...g analog input voltages can step over a setpoint window if not sampled often enough There are three possible solutions for overcoming this problem Shorten the scan period to give more timing resolutio...

Page 35: ...on and the other which is available for field calibration You can perform field calibration automatically in seconds with InstaCal and without the use of external hardware or instruments Field calibra...

Page 36: ...V 6 0 V maximum Signal to noise and distortion 72 dB typical for 10 V range 1 kHz fundamental Total harmonic distortion 80 dB typical for 10 V range 1 kHz fundamental Calibration Auto calibration cali...

Page 37: ...Digital input trigger sources and modes Refer to Table 7 Digital output trigger sources Start of input scan Data transfer DMA Sampling update rate 12 MHz maximum Pattern generation output Two of the...

Page 38: ...analog channels are enabled 1 MHz with analog channels enabled External input scan clock XAPCR maximum rate Analog 1MHz Digital 12 MHz if no analog channels are enabled 1 MHz with analog channels enab...

Page 39: ...digital trigger TTL trigger input Input signal range 15 V to 15 V maximum Trigger level TTL level sensitive Minimum pulse width 50 ns high 50 ns low Latency One scan period maximum Digital pattern tri...

Page 40: ...ermination board with screw terminals RM TB 100 19 inch rack mount kit for TB 100 Table 13 16 channel single ended pinout Pin Function Pin Function 68 ACH0 34 ACH8 67 AGND 33 ACH1 66 ACH9 32 AGND 65 A...

Page 41: ...HI 26 ACH5 LO 59 AGND 25 ACH6 HI 58 ACH6 LO 24 AGND 57 ACH7 HI 23 ACH7 LO 56 NC 22 NC 55 NC 21 NC 54 NEGREF reserved for self calibration 20 POSREF reserved for self calibration 53 GND 19 5 V refer to...

Page 42: ...ion the following conditions must be met Part CA 68 3S or CA 68 6S must be properly installed The host computer peripheral equipment power sources and expansion hardware must be CE compliant All I O c...

Page 43: ...Measurement Computing Corporation 10 Commerce Way Suite 1008 Norton Massachusetts 02766 508 946 5100 Fax 508 946 9500 E mail info mccdaq com www mccdaq com...

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