53
SEPIRQ
Meaning:
Provides the GPIN IRQS on a separate pin (GPX).
Mode:
Peripheral and Host
The CPU sets and clears these bits.
Programming Notes
The MAX3421E INT pin goes active whenever any of the internal interrupts, USB or GPIN,
asserts (assuming that the IRQ is enabled and IE = 1). This default case is shown in the top figure
below, when SEPIRQ = 0.
IRQ Logic
(Generates Pulse
or Level Output)
2
USB IRQS
GPX pin
INTLEVEL
POSINT
GPIN IRQS
BUSACT
GPXB=1
GPXA=0
INT pin
IRQ Logic
(Generates Pulse
or Level Output)
2
USB IRQS
INTLEVEL
POSINT
GPIN IRQS
GPXB=1
GPXA=0
GPX pin
INT pin
1
0
3
1
0
3
SEPIRQ = 0
SEPIRQ = 1
When the CPU sets SEPIRQ = 1, the eight GPIN IRQ signals are removed as an interrupt source
to the INT pin, and routed to the GPX pin to serve as a second MAX3421E interrupt pin (bottom
figure). The GPX[B:A] setting of 2 normally connects the BUSACT signal to the GPX pin.