Maxim Integrated MAX32660, User Manual

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MAX32660 User Guide
Maxim Integrated Page 147 of 195
Table 12-5: I
2
C Status Registers
I 2 C Status Register I2Cn_STATUS [0x0004]
Bits Name Access Reset Description
31:12 - R/W -
Reserved for Future Use
Do not modify this field.
11:8 stat RO 0
I 2 C Controller Status
This field indicates the status of the I 2 C controller.
stat Controller Status
0 Idle
1 Master Transmit address
2 Master Receive address ACK
3 Master Transmit extended address
4 Master Receive extended address ACK
5 Slave Receive address
6 Slave Transmit address ACK
7 Slave Receive extended address
8 Slave transit extended address ACK
9 Transmit data (Master or Slave)
10 Receive data ACK (Master or Slave)
11 Receive data (Master or Slave)
12 Transmit data ACK (Master or Slave)
13 NACK stage (Master or Slave)
14 Reserved for Future Use
15
Another master is addressing another slave. The
transaction is ongoing but the I
2
C controller is not
actively part of the transaction.
5 ckmd RO 0
SCL Drive Status
This field indicates if an external device is behaving as a master by actively driving the
SCL line.
0: External device not driving SCL
1: External device is a Master actively driving the SCL pin
4 txf RO 0
TX FIFO Full
When set, the TX FIFO is full.
0: TX FIFO is not full
1: TX FIFO full
3 txe RO 1
TX FIFO Empty
If set, the TX FIFO is empty.
0: TX FIFO is not empty
1: TX FIFO is empty
2 rxf RO 0
RX FIFO Full
If set, the RX FIFO is full.
0: RX FIFO not full
1: RX FIFO Full
1 rxe RO 1
RX FIFO Empty
If set, the RX FIFO is empty.
0: RX FIFO is not empty
1: RX FIFO is empty