MAX32660 User Guide
Maxim Integrated
Page 106 of 195
Equation 10-1: Timer Clock Frequency Calculation
𝑓
𝐶𝑁𝑇_𝐶𝐿𝐾
=
𝑓
𝑃𝐶𝐿𝐾
𝑝𝑟𝑒𝑠𝑐𝑎𝑙𝑒𝑟
Application firmware writes to the timer registers and external events on timer pins will be asynchronous events to the
slower timer clock frequency. These events are latched on the next rising edge of the timer clock. Since it is not possible to
observe the timer clock directly, input events may have up to 0.5 timer clock delay before being recognized.
10.3
Timer Pin Functionality
On the MAX32660, only Timer 0 supports a Timer Pin. The timer pin functionality is mapped as an alternate function that is
shared with a GPIO. Timer pin assignments are detailed in the data sheet for the specific device.
When the timer pin alternate function is enabled, the timer pin will have the same electrical characteristics, such as
pullup/pulldown strength, drive strength, etc. as the GPIO mode settings for that pin. When configured as an output, the
corresponding bit in the GPIO_OUT register should be configured to match the inactive state of the timer pin for that mode.
The pin characteristics must be configured before enabling the timer. Consult the GPIO section for details on how to
configure the electrical characteristics for the pin.
Each timer has a dedicated interrupt flag,
.irq
, which is set at the end of a timer period. If enabled, an interrupt
will be generated. The interrupt flag can be cleared by writing any value to
.irq
.
