MaximIntegrated 6-5
MAX31782 User’s Guide
Revision 0; 8/11
6.1.4ADCDataReading
The ADC has a circular data buffer that holds the results from 16 conversions . This buffer is accessed by reading the
ADDATA register when ADCFG is set to 0 . The data buffer pointed to by ADST .ADIDX[3:0] is the buffer returned when
ADDATA is read . ADIDX is automatically incremented following a read of ADDATA . This allows repeated reads of
ADDATA to return the results from multiple conversions .
When ADCONV is set to 1, the conversion always starts writing to the buffer location indexed by the ADADDR .
ADBADD[3:0] bits . As each result is written to the data buffer, the ADDAT[3:0] bits in ADST update to indicate which
data buffer location was written to last . The ADC continues writing to the data buffer until the end of the buffer . Once
the end of the data buffer is reached, the ADC index rolls over and writes data buffer 0 .
When the ADC is operated in continuous sequence mode (ADCONT = 1), the data buffer is continuously written . For
example, with a sequence of seven conversions with ADBADD[3:0] equal to 0, the first sequence writes to data buffer
location 0 to 6, the second sequence writes to location 7 to 13 and the third sequence writes to 14, 15, 0 to 4 . If the
ADC is operating in single sequence mode, each time a new sequence is initiated by writing ADCCONV to 1, the ADC
begins writing to the location specified by ADBADD[3:0] .
6.1.5ADCInterrupts
The MAX31782 provides an interrupt flag (ADST .ADDAI) that is set when conversions are complete . This flag generates
an interrupt if enabled by setting the ADCN .ADDAIE interrupt enable bit . The condition that causes the ADDAI flag to
be set can be selected using the ADCN .ADDAINV[1:0] bits .
For a sequence that uses only one configuration register (ADSTART = ADEND), setting ADDAINV = 00 generates an
interrupt with the same interval as ADDAINV = 01 . In both cases, the ADDAI flag is set after every sample . The ADDAI
flag can be cleared by software writing a 0, or it is automatically cleared when a new conversion sequence is started
by setting ADCONV to a 1 .
6.1.6UsinganExternalReference
The ADC converter can use an external reference instead of the internal reference . When IREFEN = 0, the external
reference option is enabled . The external reference needs to be applied to pin AD3N . When the external reference is
used, voltage conversions can still be performed on the AD3P pin if they are done in single-ended mode (ADDIFF = 0) .
The voltage applied as an external reference must be between 1 .1 V and 1 .3 V .
The ADC converter automatically uses the gain setting in ADCG1 when an external reference is being used . Changing
the ADCG setting has no effect on the conversion . The gain that is applied by ADCG1 probably needs to be adjusted to
meet the needs of the application . See
6.2.8 ADC Voltage Scale Trim Registers (ADCG1 and ADCG5)
for more details
on changing the gain .
6.1.7StopModeOperation
The ADC converter supports stop mode operation . On entry into stop mode, the ADC is completely shut down to con-
serve power . On exiting stop mode, the ADC waits until ADCONV = 1 before starting up . When ADCONV is set to 1, the
ADC waits 20 ADC clock cycles for setup and power-up before acquisition commences .
To prevent erroneous behavior, any ADC conversions in progress should be completed or aborted prior to entry into
stop mode . If conversions are still ongoing on entry to stop mode, any in progress conversion are aborted and the
ADCONV bit is reset to 0 .
Table6-2.ADCInterruptIntervals
ADDAINV[1:0]
SETADDAIAFTER
00
Every ADC sample
01
End of every sequence(ADSTART to ADEND)
10
Every 12 ADC samples
11
Every 16 ADC samples
