Table 26. LDO3Cfg Register (0x16)
Table 27. LDO3VSet Register (0x17)
ADDRESS:
0x16
MODE:
Read/Write
BIT
7
6
5
4
3
2
1
0
NAME
LDO3Seq
[2:0]
(Read-Only)
—
LDO3Act
DSC
LDO3En
[1:0]
LDO3
Mode
LDO3Seq[2:0]
LDO3 Enable Configuration (Read only)
000 = Disabled
001 = Enabled always when BAT/SYS is present
010 = Enabled
at 0% of Boot/POR Process Delay Control
011 = Enabled
at 25% of Boot/POR Process Delay Control
100 = Enabled
at 50% of Boot/POR Process Delay Control
101 = Disabled
110 = Disabled
111 = Controlled by LDO3En[1:0] after 100% of Boot/POR Process Delay Control
LDO3ActDSC
LDO3 Active Discharge Control
0 = LDO3 output will be actively discharged only in HardReset mode
1
= LDO3 output will be actively discharged in HardReset modes and also when its Enable goes Low. The active
discharge circuit will continue to draw additional quiescent current as long at this bit is set to 1, even when the
LDO is disabled. (See EC table.)
LDO3En
[1:0]
LDO3 Enable Configuration (effective only when LDO3Seq == 111)
00 = Disabled. LDO’s OUT not actively discharged unless in
HardReset/ShutDown/Off
Mode
01 = Enabled
10 = Enabled when MPC0 is high (regardless of MPC1)
11 = Enabled when MPC1 is high (regardless of MPC0)
LDO3Mode
LDO3 Mode Control
0 = Normal LDO operating mode
1
= Load switch mode. FET is either fully ON or OFF depending on state of LDO3En. When FET is ON, the
output is unregulated. This setting is internally latched and can change only when the LDO is disabled.
ADDRESS:
0x17
MODE:
Read/Write or Read-Only if WriteProtect Enabled (see Table 38)
BIT
7
6
5
4
3
2
1
0
NAME
—
—
—
LDO3Vset[4:0]
LDO3VSet[4:0]
LDO3 Output Voltage Setting
Linear Scale from 0.9V to 4.0V in
100mV increments
00000 = 0.9V
00001
=
1.0V
…
11111
= 4.0V
MAX20335
PMIC with Ultra-Low I
Q
Voltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com
Maxim Integrated
│
57
