Maxim Integrated MAX20335, Manual

Page: 42 / 67

I
2
C Register Map (continued)
Note:
COR = Clear
-on-read
*
Register is reset to default value upon CHGIN rising edge.
** R if WriteProtect enabled
(
Table 38
).
All R/W
registers are reset to default value when entering the off
state.
Reserved bits must not be modified from their default states
to ensure proper operation.
REGISTER
ADDRESS
REGISTER
NAME
R/W
B7
B6
B5
B4
B3
B2
B1
B0
0x13
LDO1VSet
R/W**
—
—
—
LDO1VSet[4:0]
0x14
LDO2Cfg
R/W
LDO2Seq[2:0]
—
LDO2
ActDSC
LDO2En[1:0]
LDO2Mode
0x15
LDO2VSet
R/W**
—
—
—
LDO2VSet[4:0]
0x16
LDO3Cfg
R/W
LDO3Seq[2:0]
—
LDO3
ActDSC
LDO3En[1:0]
LDO3Mode
0x17
LDO3VSet
R/W**
—
—
—
LDO3VSet[4:0]
0x18*
ThrmCfg
R/W
T1T2IFchg[2:0]
T2T3IFchg[2:0]
ThermEn[1:0]
0x19*
ThrmCfg
R/W
—
—
—
—
—
T3T4IFchg[2:0]
0x1A
MONCfg
R/W
MONRatioCfg[1:0]
MONHiZ
MONCtr[2:0]
0x1B
BootCfg
R/W
PwrRstCfg[3:0]
SftRstCfg
BootDly[1:0]
ChgAlwT
ry
0x1C
PinStat
R/W
ILim_T[2:0]
—
PFN1
PFN2
MPC1
MPC0
0x1D
Buck1/2Extra
R/W
Buck2IAdptEnb
Buck2Fst
Buck2
ActDsc
Buck2FFET
Buck1IAdptEnb
Buck1Fst
Buck1ActDSC
Buck1FFET
0x1E
PwrCfg
R/W
PFNxResEna
—
—
—
—
—
—
StayOn
0x1F
PwrCmd
R/W
PWR_CMD
MAX20335 PMIC with Ultra-Low I
Q
Voltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com
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