Burst Write
In this operation, the master sends an address and
multiple data bytes to the slave device (
).
The slave device automatically increments the
register address after each data byte is sent. The following
procedure describes the burst write operation:
1)
The master sends a START condition
2) The master sends the 7-bit slave address plus a
write bit (low)
3) The addressed slave asserts an ACK on the data
line
4) The master sends the 8-bit register address
5) The slave asserts an ACK on the data line only if the
address is valid (NAK if not)
6) The master sends eight data bits
7) The slave asserts an ACK on the data line
8)
Repeat 6 and 7 N-1 times
9) The master generates a STOP condition
Single Byte Read
In this operation, the master sends an address plus two
data bytes and receives one data byte from the slave
device (
). The following procedure describes the
single byte read operation:
1)
The master sends a START condition
2) The master sends the 7-bit slave address plus a
write bit (low)
3) The addressed slave asserts an ACK on the data
line
4) The master sends the 8-bit register address
5) The slave asserts an ACK on the data line only if the
address is valid (NAK if not)
6) The master sends a REPEATED START condition
7) The master sends the 7-bit slave address plus a
read bit (high)
8) The addressed slave asserts an ACK on the data line
9) The slave sends eight data bits
10)
The master asserts a NACK on the data line
11)
The master generates a STOP condition
Figure 8. Burst Write Sequence
Figure 9. Read Byte Sequence
MAX20335
PMIC with Ultra-Low I
Q
Voltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com
Maxim Integrated
│
39
S
DEVICE SLAVE ADDRESS - W A
8 DATA BITS - 1
BURST WRITE
A
REGISTER ADDRESS
A
8 DATA BITS - N
A
8 DATA BITS - 2
A
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
P
S
Sr
DEVICE SLAVE ADDRESS - W A
DEVICE SLAVE ADDRESS - R
READ SINGLE BYTE
A
REGISTER ADDRESS
A
8 DATA BITS
NA
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
P
