Maxim Integrated MAX20335, Manual

Page: 38 / 67

I
2
C Interface
The MAX20335 contain an I 2 C-compatible interface for
data communication with a host controller (SCL and
SDA). The interface supports a clock frequency of up to
400kHz. SCL and SDA require pullup resistors that are
connected to a positive supply.
Start, Stop, And Repeated Start Conditions
When writing to the MAX20335 using I
2
C, the master
sends a START condition (S) followed by the MAX20335
I
2
C address. After the address, the master sends the
register address of the register that is to be programmed.
The master then ends communication by issuing a
STOP condition (P) to relinquish control of the bus, or
a REPEATED START condition (Sr) to communicate to
another I
2
C slave. See Figure 6 .
Slave Address
Set the Read/
Write
bit high to configure the MAX20335
to read mode ( Table 3 ). Set the Read/ Write bit low to
configure the MAX20335 to write mode. The address is
the first byte of information sent to the MAX20335 after
the START condition.
Bit Transfer
One data bit is transferred on the rising edge of each
SCL clock cycle. The data on SDA must remain stable
during the high period of the SCL clock pulse. Changes in
SDA while SCL is high and stable are considered control
signals (see the
Start, Stop, And Repeated Start Conditions
section). Both SDA and SCL remain high when the bus
is not active.
Single-Byte Write
In this operation, the master sends an address and two
data bytes to the slave device ( Figure 7 ). The following
procedure describes the single byte write operation:
1) The master sends a START condition
2) The master sends the 7-bit slave address plus a
write bit (low)
3) The addressed slave asserts an ACK on the data line
4) The master sends the 8-bit register address
5) The slave asserts an ACK on the data line only if the
address is valid (NAK if not)
6) The master sends 8 data bits
7) The slave asserts an ACK on the data line
8) The master generates a STOP condition
Figure 6. I
2
C START, STOP and REPEATED START Conditions
Figure 7. Write Byte Sequence
Table 3. I
2
C Slave Addresses
ADDRESS FORMAT HEX BINARY
7-Bit Slave ID 0x28 0101000
Write Address 0x50 01010000
Read Address 0x51 01010001
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Q
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SCL
SDA
S Sr P
S
P
DEVICE SLAVE ADDRESS - W A
8 DATA BITS
WRITE SINGLE BYTE
FROM MASTER TO SLAVE FROM SLAVE TO MASTER
A
REGISTER ADDRESS A