MAI Basic Four 2000 Series, Service Manual, Page: 120 / 488

BFISD 8079
Signal HLD commands the drive to load the read/write heads. In the Model 4108
Base Unit, however, the heads are automatically loaded whenever motor power is
on; so the HLD signal is sent directly to the HLT input of the floppy disk con-
troller chip.
Type II commands are used to read and write data. They function when a drive
has been selected, the arm has been moved to the correct track, and the track
and the sector registers have been loaded with track and sector numbers. The
Type III and IV commands are used for several additional functions, such as
diskette memory allocation, initialization, diagnostics and interrupts.
There also are five status signals:
o WPRT- (Write PRoTect)
o TROO- (TRack number 00)
o IP- (Index Pulse)
o READY
o HLT (Head Load Timeout)
Signal WPRT- is asserted to abort any attempts to write to the diskette if the
diskette is notched for such protection. Signal TROO- is asserted when the arm
is located on the outermost track of the diskette. Signal IP- is asserted each
time the index hole on the diskette passes under a photosensitive diode. The
controller uses this signal to count diskette revolutions and abort incomplete
operations if they do not finish inside of the allotted number of revolutions.
Signal READY usually is connected the drive power or to a switch on the door of
the drive. The signal informs the controller chip that the diskette is in the
proper position inside the drive, the door is closed, and power is applied to
the drive. However, in the Model 4108 Base Unit, the READY signal is synthe-
sized by a 74LS32 OR gate (12J).
The READY input to the controller is the OR of two MOTORON(X)+ signals from the
gate. Note that the presence of the READY signal does not guarantee that the
correct drive has the motor on, nor does it check to determine whether the se-
lected drive is up to speed. Signal HLT informs the controller chip that the
head has been properly loaded and to commence read or write operations.
For additional, more detailed, information on the Western Digital WD1793 floppy
disk controller chip, the reader should refer to the manufacturer's
literature.
The next few paragraphs discuss how data is transferred to and from the flopp
disk controller chip.
3.2.19.6 Buffered Data Transfer
To improve system throughput, all data involved in transfers between the floppy
controller chip and the 68010 are buffered in the floppy sector buffer.
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