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MC80F0104/0204
Preliminary
24
Mar. 2005 Ver 0.2
8.3 Data Memory
Figure 8-8 shows the internal Data Memory space availa-
ble. Data Memory is divided into three groups, a user
RAM, control registers, and Stack memory.
Figure 8-8 Data Memory Map
User Memory
The MC80F0104/0204 has 256
×
8 bits for the user mem-
ory (RAM). RAM pages are selected by RPR (See Figure
8-9 ).
Note:
After setting RPR(RAM Page Select Register), be sure to
execute SETG instruction. When executing CLRG instruction, be
selected PAGE0 regardless of RPR.
Control Registers
The control registers are used by the CPU and Peripheral
function blocks for controlling the desired operation of the
device. Therefore these registers contain control and status
bits for the interrupt system, the timer/ counters, analog to
digital converters and I/O ports. The control registers are in
address range of 0C0
H
to 0FF
H
.
Note that unoccupied addresses may not be implemented
on the chip. Read accesses to these addresses will in gen-
eral return random data, and write accesses will have an in-
determinate effect.
More detailed informations of each register are explained
in each peripheral section.
Note:
Write only registers can not be accessed by bit manipula-
tion instruction. Do not use read-modify-write instruction. Use byte
manipulation instruction, for example “LDM”.
Example; To write at CKCTLR
LDM
CKCTLR,#0AH
;Divide ratio(
÷
32)
Stack Area
The stack provides the area where the return address is
saved before a jump is performed during the processing
routine at the execution of a subroutine call instruction or
the acceptance of an interrupt.
When returning from the processing routine, executing the
subroutine return instruction [RET] restores the contents of
the program counter from the stack; executing the interrupt
return instruction [RETI] restores the contents of the pro-
gram counter and flags.
The save/restore locations in the stack are determined by
the stack pointed (SP). The SP is automatically decreased
after the saving, and increased before the restoring. This
means the value of the SP indicates the stack location
number for the next save. Refer to Figure 8-4 on page 20.
Figure 8-9 RPR(RAM Page Select Register)
User Memory
Control
Registers
0000
H
00BF
H
00C0
H
PAGE0
PAGE1
(When “G-flag=0”,
this page0 is selected)
or Stack Area
User Memory
00FF
H
0100
H
01FF
H
(192Bytes)
(64Bytes)
Not Available
01BF
H
01C0
H
System clock source select
000 : PAGE0
001 : PAGE1
INITIAL VALUE: ---- -000
B
ADDRESS: 0E1
H
RPR
010 : Not used
011 : Not used
-
7
6
5
4
3
2
1
0
-
-
R/W
R/W
R/W
RPR2
-
-
RPR1 RPR0
100 : Not used
-
others : Setting prohibited
Summary of Contents for MC80C0104
Page 108: ...MC80F0104 0204 Preliminary 104 Mar 2005 Ver 0 2 25 Emulator EVA Board Setting...
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