LSI LSI53C896, Technical Manual

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2-22 Functional Description
A complete set of development tools is available for writing custom
drivers with SCSI SCRIPTS. For more information on the SCSI SCRIPTS
instructions supported by the LSI53C896, see
Chapter 5, “SCSI
SCRIPTS Instruction Set.”
2.2.3 64-Bit Addressing in SCRIPTS
The LSI53C896 has a 64-bit PCI interface which provides 64-bit address
and data capability in the initiator mode. The chip can also respond to
64-bit addressing in the target mode.
DACs can be generated for all SCRIPTS operations. There are six
selector registers which hold the upper Dword of a 64-bit address. All but
one of these is static and requires manual loading using a CPU access,
a Load/Store instruction, or a memory move instruction. One of the
selector registers is dynamic and is used during 64-bit direct block moves
only. All selectors will default to zero, meaning the LSI53C896 will
power-up in a state where only Single Address Cycles (SACs) will be
generated. When any of the selector registers are written to a nonzero
value, DACs will be generated.
Direct, table indirect and indirect block moves, Memory-to-Memory
Moves, Load/Stores and jumps are all instructions with 64-bit address
capability.
Crossing the 4 Gbyte boundary on any one SCRIPTS operation is not
permitted and software needs to take care that any given SCRIPTS
operation will not cross the 4 Gbyte boundary.
2.2.4 Hardware Control of SCSI Activity LED
The LSI53C896 has the ability to control a LED through the GPIO_0 pin
to indicate that it is connected to the SCSI bus. Formerly this function
was done by a software driver.
When bit 5 (LED_CNTL) in the General Purpose Pin Control (GPCNTL)
register is set and bit 6 (Fetch Enable) in the GPCNTL register is cleared
and the LSI53C896 is not performing an EEPROM autodownload, then
bit 3 (CON) in the
Interrupt Status Zero (ISTAT0) register will be
presented at the GPIO_0 pin.
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