LSI LSI53C896, Technical Manual

Page: 143 / 370

SCSI Registers 4-31
Note: It is important that these bits are set to the proper values
to guarantee that the LSI53C896 meets the SCSI timings
as defined by the ANSI specification.
Register: 0x04
SCSI Chip ID (SCID)
Read/Write
R Reserved 7
RRE Enable Response to Reselection 6
When this bit is set, the LSI53C896 SCSI function is
enabled to respond to bus-initiated reselection at the chip
ID in the
Response ID Zero (RESPID0) and Response ID
One (RESPID1) registers. Note that the chip does not
automatically reconfigure itself to the initiator mode as a
result of being reselected.
SRE Enable Response to Selection 5
When this bit is set, the LSI53C896 SCSI function is able
to respond to bus-initiated selection at the chip ID in the
Response ID Zero (RESPID0) and Response ID One
(RESPID1) registers. Note that the chip does not
automatically reconfigure itself to target mode as a result
of being selected.
SCF2
CCF2 SCF1
CCF1 SCF0
CCF0 Factor
Frequency
SCSI Clock
(MHz)
0 0 0 SCLK/3 50.01–75.0
0 0 1 SCLK/1 16.67–25.0
0 1 0 SCLK/1.5 25.01–37.5
0 1 1 SCLK/2 37.51–50.0
1 0 0 SCLK/3 50.01–75.0
1 0 1 SCLK/4 75.01–80.00
1 1 0 SCLK/6 120
1 1 1 SCLK/8 160
7 6 5 4 3 0
R RRE SRE R ENC[3:0]
x 0 0 x 0 0 0 0
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