LSI LSI53C896, Technical Manual

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4-18 Registers
DSLT[3:0] Data_Select [12:9]
The LSI53C896 does not support the data register.
Therefore, these four bits are always cleared.
PEN PME_Enable 8
The LSI53C896 always returns zero for this bit to indicate
that PME assertion is disabled.
R Reserved [7:2]
PWS[1:0] Power State [1:0]
Bits [1:0] are used to determine the current power state
of the LSI53C896. They are used to place the LSI53C896
in a new power state. Power states are defined as:
See the Section 2.5, “Power Management,” for
descriptions of the Power Management States.
Register: 0x46
Bridge Support Extensions (PMCSR_BSE)
Read Only
BSE Bridge Support Extensions [7:0]
This register indicates PCI Bridge specific functionality.
The LSI53C896 always returns 0x00.
0b00 D0
0b01 D1
0b10 D2
0b11 D3 hot
7 0
BSE
0 0 0 0 0 0 0 0
*