LSI LSI53C1000, Technical Manual

Page: 27 / 384

Summary of LSI53C1000 Benefits 1-11
•
SCSI clock quadrupler bits enable Ultra160 SCSI transfer rates with
a 40 MHz SCSI clock input.
•
Selectable INT pin disable bit.
•
Compatible with 3.3 V and 5 V PCI.
1.6.6 Reliability
The following features enhance the reliability of the LSI53C1000:
•
CRC and AIP provide end-to-end SCSI I/O protection.
•
2 kV ESD protection on SCSI signals.
•
Protection against bus reflections due to impedance mismatches.
•
Controlled bus assertion times (reduces RFI, improves reliability, and
eases FCC certification).
•
Latch-up protection greater than 150 mA.
•
Voltage feed-through protection (minimum leakage current through
SCSI pads).
•
A high proportion of pins are power and ground.
•
Power and ground isolation of I/O pads and internal chip logic.
•
TolerANT technology provides:
– Active negation of SCSI Data, Parity, Request, and Acknowledge
signals for improved fast SCSI transfer rates.
– Input signal filtering on SCSI receivers improves data integrity,
even in noisy cabling environments.
1.6.7 Testability
The following features enhance the testability of the LSI53C1000:
•
All SCSI signals accessible through programmed I/O.
•
SCSI bus signal continuity checking.
•
Support for single-step mode operation.
•
JTAG boundary scan.