background image

1

dc2317af

DEMO MANUAL 

DC2317A

DESCRIPTION

LTC7103 

105V, 2.3A Low EMI Synchronous 

Step-Down Regulator

Demonstration circuit 2317A is a 100V monolithic DC/

DC step-down regulator featuring the 

LTC

®

7103

. The 

demo board is designed for a 5V/2.3A output from a 5V 

to 100V input at 400kHz switching frequency. The wide 

input range makes it suitable for automotive, industrial, 

medical instrument, and telecom applications. This buck 

regulator has a peak efficiency of 93.5% at 12V

IN

, 88.3% 

at 48V

IN

 and 81.5% at 100V

IN

 (see Figure 3). 

The LTC7103 is a compact, high efficiency synchronous 

monolithic step-down switching regulator with fast cur-

rent programming. The power switches, compensation 

network and other necessary circuits are inside of the 

LTC7103 to minimize external components and simplify 

design. The LTC7103 has wide operating range from 4.4V 

to 105V. A 40ns minimum on-time, together with 100% 

maximum duty cycle allow practical use at any output volt-

age between 1V and V

IN

. The switching frequency can be 

programmed either via an oscillator resistor or an external 

clock over a 200kHz to 2MHz range. Additional features 

include a fast and accurate output current programming 

and monitoring, and ultralow EMI/EMC emissions.
The demo board has an EMI filter installed. The EMI 

performance of the board (with EMI filter) is shown in 

Figure 2. The figure shows that the circuit passes the 

L

, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks 

of Analog Devices, Inc. All other trademarks are the property of their respective owners.

PERFORMANCE SUMMARY

CISPR 25 radiated emission test with a wide margin. To 

achieve EMI/EMC performance as shown in Figure 2, the 

input EMI filter is required and the input voltage should 

be applied at +VIN_EMI turret pin.
The demo board provides current monitor and output 

clock signal to interface with an external application cir-

cuit. User selectable mode selection (JP1) is provided and 

Burst Mode

®

 operation position is selected by default. 

Burst Mode operation increases light load efficiency while 

pulse-skipping mode allows constant-frequency operation 

to a lighter load. This demo board allows phase-locked 

loop (PLL) synchronization to an external clock by select-

ing SYNC mode on JP1 and by providing a clock signal 

on CLKIN turret.
The LTC7103 data sheet gives a complete description of 

the part, operation and application information. The data 

sheet must be read in conjunction with this demo manual 

for DC2317A. The LTC7103 is assembled in the 36 (26) 

lead QFN package. Proper board layout is essential for 

maximum thermal and electrical performance. See the 

data sheet sections for details.

Design files for this circuit board are available at  

http://www.linear.com/demo/DC2317A

Specifications are at T

A

 = 25°C

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

IN

Input Supply Range

5

100

V

V

OUT

Output Voltage 

5

V

I

OUT

Output Current Range, Continuous

Free Air

0

2.3

A

f

SW

Switching (Clock) Frequency

400

kHz

V

OUTP-P

Output Ripple

V

IN

 = 100V, V

OUT

 = 5V, I

OUT

 = 2.3A (20MHz BW)

50

mV

P-P

P

OUT

/PIN

Efficiency

V

IN

 = 12V, I

OUT

 = 1A 

V

IN

 = 48V, I

OUT

 = 1A

92.6 

88.1

%

Approximate Size

Component Area x Top Component Height

1.0 × 0.7 × 0.3

Inches

Summary of Contents for LTC7103

Page 1: ...ces Inc All other trademarks are the property of their respective owners PERFORMANCE SUMMARY CISPR 25 radiated emission test with a wide margin To achieve EMI EMC performance as shown in Figure 2 the...

Page 2: ...passed by connecting the input power supply to VIN and GND 3 With power off connect loads from VOUT to GND 4 Turn on the power at the input Make sure that the input voltage does not exceeds 100V 5 Che...

Page 3: ...00kHz VERTICAL POLARIZATION CLASS 5 PEAK LIMIT LTC7103 FREQUENCY MHz 0 100 200 300 400 500 600 700 800 900 1000 0 10 20 30 40 50 AMPLITUDE dB V m dc2017a F02a HORIZONTAL POLARIZATION CLASS 5 PEAK LIMI...

Page 4: ...2317af DEMO MANUAL DC2317A Figure 3 Efficiency at Various Input Voltages Conditions Burst Mode Operation QUICK START PROCEDURE Figure 4 Efficiency at Various Input Voltages Conditions Pulse Skipping M...

Page 5: ...17A QUICK START PROCEDURE Figure 5 Output Ripple at 100VIN 5VOUT and 2 3AOUT 50mV 500ns DIV 20MHz Bandwidth Figure 6 Transient Response Waveform at 48VIN 5VOUT and 1 1AOUT to 2 3AOUT to 1 1AOUT 1A 200...

Page 6: ...MANUAL DC2317A Figure 7 Thermal Plots without Forced Air Conditions 12VIN 5VOUT at 2 3AOUT Conditions 24VIN 5VOUT at 2 3AOUT Conditions 48VIN 5VOUT at 2 3AOUT Conditions 100VIN 5VOUT at 2 3AOUT QUICK...

Page 7: ...7 dc2317af DEMO MANUAL DC2317A Figure 8 Board Photo QUICK START PROCEDURE...

Page 8: ...06030000Z0EA 12 1 R8 RES 1k 1 0603 VISHAY CRCW06031K00FKEA 13 1 R13 RES 100k 1 0603 VISHAY CRCW0603100KFKEA 14 1 R15 RES 8 87k 1 0603 VISHAY CRCW06038K87FKEA 15 1 R16 RES 17 8k 1 0603 NIC NRC06F1782TR...

Page 9: ...rporation is believed to be accurate and reliable However no responsibility is assumed for its use Linear Technology Corporation makes no representa tion that the interconnection of its circuits as de...

Page 10: ...OR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES The user assumes all responsibi...

Reviews: