LTC3115-1
31
Rev. C
APPLICATIONS INFORMATION
Figure 16. PCB Layout Recommended for the DHD Package
[16]
PWM/
SYNC
[15]
SW1
VIA TO GROUND PLANE
(AND TO INNER LAYER
WHERE SHOWN)
INNER PCB
LAYER ROUTES
V
IN
UNINTERRUPTED GROUND PLANE SHOULD EXIST UNDER ALL COMPONENTS SHOWN IN
BOLD AND UNDER TRACES CONNECTING TO THOSE COMPONENTS
[14]
PV
IN
[13]
BST1
C
BST1
C
BST2
[12]
BST2
[17]
PGND
[11]
PV
CC
[10]
V
IN
[9]
V
CC
31151 F16
[2]
SW2
[1]
RUN
[3]
PV
OUT
[4]
GND
[5]
GND
R
BOT
R
TOP
V
OUT
[6]
VC
KELVIN
BACK TO
GND PIN
OPTIONAL SCHOTTKY DIODE
KELVIN
TO V
OUT
[7]
FB
[8]
RT
R
T
