The following table shows the DIMM population sequence for mirroring mode when two processors
(Processor 1 and Processor 2) are installed.
Table 10. Mirroring mode with two processors
Total
Processor 2
Processor 1
Total
DIMMs 24 23 22 21 20 19 18 17 16 15 14 13
12 11 10
9
8
7
6
5
4
3
2
1 DIMMs
4
17
15
5
3
4
5
17
15
5
3
1
5
6
17
15
13
5
3
1
6
7
17
15
13
10
8
5
3
7
8
22
20
17
15
10
8
5
3
8
9
17
15
13
12
10
8
5
3
1
9
10
22
20
17
15
12
10
8
5
3
1
10
12
24
22
20
17
15
13
12
10
8
5
3
1
12
13
22
20
17
15
12
10
8
6
5
4
3
2
1
13
14
22 21 20 19 18 17 16 15
12
10
8
5
3
1
14
15
24
22
20
17
15
13
12
10
8
6
5
4
3
2
1
15
16
22 21 20 19 18 17 16 15
10
9
8
7
6
5
4
3
16
17
22 21 20 19 18 17 16 15
12
10
8
6
5
4
3
2
1
17
18
24
22
20
18 17 16 15 14 13
12
10
8
6
5
4
3
2
1
18
20
22 21 20 19 18 17 16 15
12 11 10
9
8
7
6
5
4
3
2
1
20
21
24
22
20
18 17 16 15 14 13
12 11 10
9
8
7
6
5
4
3
2
1
21
24
24 23 22 21 20 19 18 17 16 15 14 13
12 11 10
9
8
7
6
5
4
3
2
1
24
Rank sparing mode
In rank sparing mode, one rank of a DIMM works as the spare rank for the other ranks on the same channel.
The spare rank is not available as system memory.
Notes:
• All DIMMs to be installed must be the same type with the same capacity, frequency, voltage, and ranks.
• If the rank of installed DIMMs is one rank, follow the installation rules listed in the following tables. If the
rank of installed DIMMs is more than one rank, follow the installation rules of independent mode.
The following table shows the DIMM population sequence for rank sparing mode when only one processor
(Processor 1) is installed.
Table 11. Rank sparing mode with one processor
Total
Processor 1
Total
DIMMs
12
11
10
9
8
7
6
5
4
3
2
1
DIMMs
2
6
5
2
4
8
7
6
5
4
6
8
7
6
5
4
3
6
8
10
9
8
7
6
5
4
3
8
38
User Guide forThinkAgile MX Certified Node 2U
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